diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2023-02-17 16:42:42 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-04-04 14:09:48 +0000 |
| commit | 5103b87a4d7b0b84a9773f9dc19a36caa7d4344f (patch) | |
| tree | 7e20ba81087fe0519cb70632c176fceae299af6b /src/mainboard/starlabs/starbook/variants | |
| parent | db8ef01e300943fb9bd08c0f988d91c6cc326616 (diff) | |
mb/starlabs/starbook/adl: Add an option to enable Hot Plug
Some third-party SSDs, from Samsung and WD, such as the 990 Pro and
WD Black 850X aren't initialised by coreboot, seemingly as coreboot
is too quick; debug builds work, and enabling hotplug does.
Add a cmos option `pci_hot_plug`, defaulting to enabled to allow these
SSDs to work.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I680211bc87153a5e6005d58040a94725c0973451
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73092
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/starlabs/starbook/variants')
| -rw-r--r-- | src/mainboard/starlabs/starbook/variants/adl/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/starlabs/starbook/variants/adl/ramstage.c | 15 |
2 files changed, 16 insertions, 0 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/adl/Makefile.inc b/src/mainboard/starlabs/starbook/variants/adl/Makefile.inc index 2a505c35c7..9abc069b38 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/Makefile.inc +++ b/src/mainboard/starlabs/starbook/variants/adl/Makefile.inc @@ -7,3 +7,4 @@ romstage-y += romstage.c ramstage-y += devtree.c ramstage-y += gpio.c ramstage-y += hda_verb.c +ramstage-y += ramstage.c diff --git a/src/mainboard/starlabs/starbook/variants/adl/ramstage.c b/src/mainboard/starlabs/starbook/variants/adl/ramstage.c new file mode 100644 index 0000000000..7accb1d365 --- /dev/null +++ b/src/mainboard/starlabs/starbook/variants/adl/ramstage.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <option.h> +#include <soc/ramstage.h> + + +void mainboard_silicon_init_params(FSP_S_CONFIG *supd) +{ + /* + * Enable Hot Plug on RP5 to slow down coreboot so that + * third-party drives are detected. + */ + if (get_uint_option("pci_hot_plug", 0) == 1) + supd->PcieRpHotPlug[4] = 1; +} |