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authorSean Rhodes <sean@starlabs.systems>2022-05-16 12:45:10 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-05-21 16:26:13 +0000
commitf304d5ff8ca22409216d919d379385eb7ba4bb3e (patch)
tree89050ba197b16d151bd63e7c8af0dc4d9ca43beb /src/mainboard/starlabs/lite
parent53553e8ee5c55030e3b60e933669f55994cc6ab7 (diff)
mb/starlabs/lite/glk: Correct indendation in devicetree
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I780e2765059ad7473fe5f33c50dd0d8a561151fd Reviewed-on: https://review.coreboot.org/c/coreboot/+/64390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/starlabs/lite')
-rw-r--r--src/mainboard/starlabs/lite/variants/glk/devicetree.cb5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
index 6abcda7941..884bf7ed54 100644
--- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
+++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
@@ -105,7 +105,8 @@ chip soc/intel/apollolake
register "usb3_port[1]" = "PORT_EN(OC0)"
# Daughterboard USB 3.0
register "usb3_port[2]" = "PORT_EN(OC0)"
- end device pci 15.1 off end # XDCI
+ end
+ device pci 15.1 off end # XDCI
device pci 16.0 off end # I2C0
device pci 16.1 off end # I2C1
device pci 16.2 off end # I2C2
@@ -152,7 +153,7 @@ chip soc/intel/apollolake
device pnp 4e.19 off end # Power Management Channel 5
end
end
- device pci 1f.1 off end # SMBus
+ device pci 1f.1 off end # SMBus
end
chip drivers/crb
device mmio 0xfed40000 on end