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authorSean Rhodes <sean@starlabs.systems>2022-05-18 09:20:07 +0100
committerMartin L Roth <gaumless@tutanota.com>2022-05-28 03:50:14 +0000
commit2bbb6f3064b2af162d53b41b2b4d95581ab5ab9c (patch)
treec51979d68d4472f1607c24d16bb1625c50df3559 /src/mainboard/starlabs/lite
parent0ef8ad2ea51fb8039006f3a8475247f47a0884d7 (diff)
mb/starlabs/lite/{glk/glkr}: Disable PMC PCI device
The PMC is accessed via sideband registers, so the PCI device is not needed. Disabling it solves a bug where the laptop cannot be powered on without the charger connected. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I78f4aa4567dfc154ef5cb21f8746265259cd53e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64451 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/starlabs/lite')
-rw-r--r--src/mainboard/starlabs/lite/variants/glk/devicetree.cb2
-rw-r--r--src/mainboard/starlabs/lite/variants/glkr/devicetree.cb2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
index 22ad4da6fd..b1b8b445f6 100644
--- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
+++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
@@ -68,7 +68,7 @@ chip soc/intel/apollolake
end
end
device pci 0d.0 off end # P2SB
- device pci 0d.1 on end # PMC
+ device pci 0d.1 off end # PMC
device pci 0d.2 on end # SPI
device pci 0d.3 off end # Shared SRAM
device pci 0e.0 on end # Audio
diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
index 3d9d91e6ff..dad2a43a4c 100644
--- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
+++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
@@ -66,7 +66,7 @@ chip soc/intel/apollolake
end
end
device pci 0d.0 off end # P2SB
- device pci 0d.1 on end # PMC
+ device pci 0d.1 off end # PMC
device pci 0d.2 on end # SPI
device pci 0d.3 off end # Shared SRAM
device pci 0e.0 on end # Audio