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authorFelix Held <felix-coreboot@felixheld.de>2022-05-05 15:19:03 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-06 14:37:25 +0000
commit00ec1b9fc7baf8bbf3eb506225274e519c16e4fe (patch)
treebb6bb1d4295af774b6c22e201cbd6faa94d9f855 /src/mainboard/starlabs/lite/variants
parentd8d522884bfbc2b5239a9ece77ab074c846167bd (diff)
soc/amd/common/block/psp/psp_gen2: simplify soc_read_c2p38
Commit 198cc26e4951b3dbca588286706b7df562c45d42 (soc/amd/common/block/ psp/psp_gen2: use SMN access to PSP) changed how the PSP registers are accessed. Since the new method doesn't need to rely on a MMIO base address to be configured, the read will always be successful and so soc_read_c2p38 doesn't need to return an error status and can directly return the value instead. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I1abace04668947ba3223a107461a27dddc0a9d83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64078 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ritul guru <ritul.bits@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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