diff options
| author | Kane Chen <kane.chen@intel.corp-partner.google.com> | 2021-11-29 18:31:02 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-03 15:38:00 +0000 |
| commit | 2a30359d5a8717825f7e7fb43e1feffa951b275c (patch) | |
| tree | a736f6943118abea9249ad3961ca74d4dcda66c5 /src/mainboard/starlabs/labtop/cmos.layout | |
| parent | ea1bb5f7de084ee812a3094fd1a4876c91ef70e6 (diff) | |
mb/google/brya/var/brask: Set vGPIO reset type
Due to the vGPIO is not reset when we power on through S5, we would
met MCA when PCIE send L1 request without following Ack
BUG=b:207625007
TEST=S0->S3->S5->power key->S3->S0, see if boot up normal
Change-Id: I20cdd1650d1ca774065a6c051006dfd0b7a3fd79
Signed-off-by: Curtis Chen <curtis.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59726
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhuohao Lee <zhuohao@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/starlabs/labtop/cmos.layout')
0 files changed, 0 insertions, 0 deletions