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| author | Anton Kochkov <anton.kochkov@gmail.com> | 2012-06-27 07:16:03 +0400 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-06-29 22:13:57 +0200 |
| commit | ac6e3172ff7c1c11da59c488b239d08af1248503 (patch) | |
| tree | c09f1ce7160f01029d299932adc410b2a7338e12 /src/mainboard/soyo | |
| parent | 8fef6625050fc7973dab8c6d2ca317057bd978b2 (diff) | |
libpayload: OHCI driver correct PCI BAR reading
Correct registers base (PCI BAR) reading to be
more specification friendly. Registers base
only in [31-12] bits, all other proposed to be 0
but that not true for some motherboards. So
adding mask to use only valid bits.
Change-Id: I2e9a4997e016dab812ccfe654e966bc91d42a625
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-on: http://review.coreboot.org/1143
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/soyo')
0 files changed, 0 insertions, 0 deletions