diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-01-17 15:27:18 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-01-18 20:46:48 +0000 |
commit | 8f274e147a24f0b877420dc045625e47705b4ed9 (patch) | |
tree | 6881b0c20bbf93769d749a8dbe5dc4d8513ef75e /src/mainboard/soyo | |
parent | 4c65398c10fa4583ad6b83ddc7f7873625a6ddbf (diff) |
Intel i440bx boards: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
Mainboards:
src/mainboard/a-trend/atc-6220
src/mainboard/a-trend/atc-6240
src/mainboard/abit/be6-ii_v2_0
src/mainboard/azza/pt-6ibd
src/mainboard/biostar/m6tba
src/mainboard/compaq/deskpro_en_sff_p600
src/mainboard/gigabyte/ga-6bxc
src/mainboard/gigabyte/ga-6bxe
src/mainboard/msi/ms6119
src/mainboard/msi/ms6147
src/mainboard/msi/ms6156
src/mainboard/nokia/ip530
src/mainboard/soyo/sy-6ba-plus-iii
src/mainboard/tyan/s1846
Change-Id: Id895963f9641bcaaa65e8a8cb21213a758a9ad80
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/23301
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/soyo')
-rw-r--r-- | src/mainboard/soyo/Kconfig | 30 | ||||
-rw-r--r-- | src/mainboard/soyo/Kconfig.name | 2 | ||||
-rw-r--r-- | src/mainboard/soyo/sy-6ba-plus-iii/Kconfig | 39 | ||||
-rw-r--r-- | src/mainboard/soyo/sy-6ba-plus-iii/Kconfig.name | 2 | ||||
-rw-r--r-- | src/mainboard/soyo/sy-6ba-plus-iii/board_info.txt | 5 | ||||
-rw-r--r-- | src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb | 69 | ||||
-rw-r--r-- | src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c | 49 | ||||
-rw-r--r-- | src/mainboard/soyo/sy-6ba-plus-iii/romstage.c | 42 |
8 files changed, 0 insertions, 238 deletions
diff --git a/src/mainboard/soyo/Kconfig b/src/mainboard/soyo/Kconfig deleted file mode 100644 index 76bf46d9a0..0000000000 --- a/src/mainboard/soyo/Kconfig +++ /dev/null @@ -1,30 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -if VENDOR_SOYO - -choice - prompt "Mainboard model" - -source "src/mainboard/soyo/*/Kconfig.name" - -endchoice - -source "src/mainboard/soyo/*/Kconfig" - -config MAINBOARD_VENDOR - string - default "Soyo" - -endif # VENDOR_SOYO diff --git a/src/mainboard/soyo/Kconfig.name b/src/mainboard/soyo/Kconfig.name deleted file mode 100644 index 33f29fffbf..0000000000 --- a/src/mainboard/soyo/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config VENDOR_SOYO - bool "Soyo" diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig b/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig deleted file mode 100644 index 0a478995d3..0000000000 --- a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig +++ /dev/null @@ -1,39 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -if BOARD_SOYO_SY_6BA_PLUS_III - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_INTEL_SLOT_1 - select NORTHBRIDGE_INTEL_I440BX - select LATE_CBMEM_INIT - select SOUTHBRIDGE_INTEL_I82371EB - select SUPERIO_ITE_IT8671F - select HAVE_PIRQ_TABLE - select BOARD_ROMSIZE_KB_256 - -config MAINBOARD_DIR - string - default soyo/sy-6ba-plus-iii - -config MAINBOARD_PART_NUMBER - string - default "SY-6BA+ III" - -config IRQ_SLOT_COUNT - int - default 7 - -endif # BOARD_SOYO_SY_6BA_PLUS_III diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig.name b/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig.name deleted file mode 100644 index 05f55a183f..0000000000 --- a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_SOYO_SY_6BA_PLUS_III - bool "SY-6BA+ III" diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/board_info.txt b/src/mainboard/soyo/sy-6ba-plus-iii/board_info.txt deleted file mode 100644 index 25ff69836d..0000000000 --- a/src/mainboard/soyo/sy-6ba-plus-iii/board_info.txt +++ /dev/null @@ -1,5 +0,0 @@ -Category: desktop -ROM package: DIP32 -ROM protocol: Parallel -ROM socketed: y -Flashrom support: y diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb deleted file mode 100644 index 274d6a9d23..0000000000 --- a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb +++ /dev/null @@ -1,69 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -chip northbridge/intel/i440bx # Northbridge - device cpu_cluster 0 on # APIC cluster - chip cpu/intel/slot_1 # CPU - device lapic 0 on end # APIC - end - end - device domain 0 on # PCI domain - device pci 0.0 on end # Host bridge - device pci 1.0 on end # PCI/AGP bridge - chip southbridge/intel/i82371eb # Southbridge - device pci 7.0 on # ISA bridge - chip superio/ite/it8671f # Super I/O - device pnp 370.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 370.1 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 370.2 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 370.3 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 370.5 on # PS/2 keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - end - device pnp 370.6 on # PS/2 mouse - irq 0x70 = 12 - end - end - end - device pci 7.1 on end # IDE - device pci 7.2 on end # USB - device pci 7.3 on end # ACPI - register "ide0_enable" = "1" - register "ide1_enable" = "1" - register "ide_legacy_enable" = "1" - # Enable UDMA/33 for higher speed if your IDE device(s) support it. - register "ide0_drive0_udma33_enable" = "0" - register "ide0_drive1_udma33_enable" = "0" - register "ide1_drive0_udma33_enable" = "0" - register "ide1_drive1_udma33_enable" = "0" - end - end -end diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c b/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c deleted file mode 100644 index f6b5ce7455..0000000000 --- a/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ - 0x00, /* Interrupt router bus */ - (0x07 << 3) | 0x0, /* Interrupt router dev */ - 0xc00, /* IRQs devoted exclusively to PCI usage */ - 0x8086, /* Vendor */ - 0x7000, /* Device */ - 0, /* Miniport */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x9c, /* Checksum (has to be set to some value that - * would give 0 after the sum of all bytes - * for this structure (including checksum). - */ - { - /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x0f << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x1, 0x0}, - {0x00, (0x10 << 3) | 0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}}, 0x2, 0x0}, - {0x00, (0x11 << 3) | 0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}}, 0x3, 0x0}, - {0x00, (0x12 << 3) | 0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}}, 0x4, 0x0}, - {0x00, (0x13 << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x5, 0x0}, - {0x00, (0x07 << 3) | 0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0}, - {0x00, (0x01 << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0}, - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c deleted file mode 100644 index 0bb1ab2552..0000000000 --- a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <device/pci_def.h> -#include <device/pnp_def.h> -#include <console/console.h> -#include <southbridge/intel/i82371eb/i82371eb.h> -#include <northbridge/intel/i440bx/raminit.h> -#include <cpu/x86/bist.h> -#include <cpu/intel/romstage.h> -#include <superio/ite/it8671f/it8671f.h> -#include <lib.h> - -#define SERIAL_DEV PNP_DEV(0x370, IT8671F_SP1) - -int spd_read_byte(unsigned int device, unsigned int address) -{ - return smbus_read_byte(device, address); -} - -void mainboard_romstage_entry(unsigned long bist) -{ - it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - report_bist_failure(bist); - - enable_smbus(); - sdram_initialize(); -} |