summaryrefslogtreecommitdiff
path: root/src/mainboard/soyo
diff options
context:
space:
mode:
authorStefan Reinauer <reinauer@chromium.org>2013-02-12 15:20:54 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-02-14 07:07:20 +0100
commit0aa37c488bf785466e0db9897805ebf287af48eb (patch)
treebbbdb3fd2cd6e9972d44df79e5c1232ba1928111 /src/mainboard/soyo
parent398e84c71a15b7db8c631bb5b17d1a1a60c91128 (diff)
sconfig: rename lapic_cluster -> cpu_cluster
The name lapic_cluster is a bit misleading, since the construct is not local APIC specific by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-x86 systems without adding new keywords. Change-Id: Icd7f5fcf6f54d242eabb5e14ee151eec8d6cceb1 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2377 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/soyo')
-rw-r--r--src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb
index c39a2ce554..db9c4b70db 100644
--- a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb
+++ b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb
@@ -19,7 +19,7 @@
##
chip northbridge/intel/i440bx # Northbridge
- device lapic_cluster 0 on # APIC cluster
+ device cpu_cluster 0 on # APIC cluster
chip cpu/intel/slot_1 # CPU
device lapic 0 on end # APIC
end