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authorMaximilian Brune <maximilian.brune@9elements.com>2024-04-15 12:58:29 +0200
committerMaximilian Brune <maximilian.brune@9elements.com>2024-06-12 19:16:26 +0000
commite437cb5f87a022c5e219ce1aadfd16a2078e0e86 (patch)
treef897ad9d9279abc85dbc93ae4d98e7221d71bf60 /src/mainboard/sifive
parent61dee38ee05cc039e4f5cf6358140a19571d4a4d (diff)
soc/sifive/fu540/chip.c: Add RAM resources
Add RAM region so that the payload can be placed in there without coreboot complaining that the payload doesn't target a RAM region. Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: Id07eae3560ce69cd8a6a695702fa0b4463c50855 Reviewed-on: https://review.coreboot.org/c/coreboot/+/81909 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/sifive')
-rw-r--r--src/mainboard/sifive/hifive-unleashed/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/sifive/hifive-unleashed/devicetree.cb b/src/mainboard/sifive/hifive-unleashed/devicetree.cb
index 796c232c2d..02d8dee58f 100644
--- a/src/mainboard/sifive/hifive-unleashed/devicetree.cb
+++ b/src/mainboard/sifive/hifive-unleashed/devicetree.cb
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
chip soc/sifive/fu540
- device cpu_cluster 0 on end
+ device cpu_cluster 0 on ops fu540_cpu_ops end
end