summaryrefslogtreecommitdiff
path: root/src/mainboard/siemens
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2021-03-25 00:50:34 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-03-29 18:56:36 +0000
commitc1042ba2c5dc19194a75a87f1e717f411582dc9a (patch)
tree6ac2cc28df5261e293fe1252a3627ca5a9747534 /src/mainboard/siemens
parent51d6f5cc0a75c32a19489fb22f004b4678bbd9f4 (diff)
soc/amd: move PM_RST_CTRL1 register definition to common acpimmio header
TEST=Verified that this register and the defined bits exist in Cezanne, Picasso, Stoneyridge, Bolton and SB800. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I32d1d577b05edab006981516a5aefd822e7b984a Reviewed-on: https://review.coreboot.org/c/coreboot/+/51783 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/siemens')
0 files changed, 0 insertions, 0 deletions