diff options
author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2023-04-04 11:07:30 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-04-26 12:07:21 +0000 |
commit | ae5852bd7b0f597816b36e36d6c4d9cfe03f1af1 (patch) | |
tree | e3f20e8ce8345276e0f0c7de15b2b48f9726ce10 /src/mainboard/siemens | |
parent | 87389bcb5eb2a2aa032f28518f3ccb642118a634 (diff) |
mb/siemens/mc_ehl4: Adjust GPIOs
Since mc_ehl4 was only a copy of mc_ehl1 in a first step, the GPIOs must
be adjust according to the circuit diagram for this mainboard.
Change-Id: I66bfbb380e9a05b3a2c08d5d1980e9749b46ee43
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens')
-rw-r--r-- | src/mainboard/siemens/mc_ehl/variants/mc_ehl4/gpio.c | 54 |
1 files changed, 7 insertions, 47 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/gpio.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/gpio.c index ea814a09ac..9f1c77f20a 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/gpio.c +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/gpio.c @@ -8,24 +8,17 @@ static const struct pad_config gpio_table[] = { /* Community 0 - GpioGroup GPP_B */ PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), /* PMC_VRALERT_N */ PAD_CFG_NF(GPP_B3, NONE, PLTRST, NF4), /* ESPI_ALERT0_N */ - PAD_CFG_NF(GPP_B4, NONE, PLTRST, NF4), /* ESPI_ALERT1_N */ + PAD_NC(GPP_B4, NONE), /* Not connected */ PAD_NC(GPP_B9, NONE), /* Not connected */ PAD_NC(GPP_B10, NONE), /* Not connected */ PAD_CFG_NF(GPP_B11, NONE, PLTRST, NF1), /* PMC_ALERT_N */ PAD_NC(GPP_B14, NONE), /* Not connected */ - PAD_CFG_NF(GPP_B15, NONE, PLTRST, NF5), /* ESPI_CS1_N */ + PAD_NC(GPP_B15, NONE), /* Not connected */ PAD_NC(GPP_B18, NONE), /* Not connected */ PAD_NC(GPP_B19, NONE), /* Not connected */ - PAD_NC(GPP_B20, NONE), /* Not connected */ - PAD_NC(GPP_B21, NONE), /* Not connected */ - PAD_NC(GPP_B22, NONE), /* Not connected */ PAD_NC(GPP_B23, NONE), /* Not connected */ /* Community 0 - GpioGroup GPP_T */ - PAD_CFG_NF(GPP_T4, UP_20K, DEEP, NF1), /* PSE_GBE0_INT */ - PAD_CFG_NF(GPP_T5, DN_20K, DEEP, NF1), /* PSE_GBE0_RST_N */ - PAD_CFG_NF(GPP_T6, NONE, DEEP, NF1), /* PSE_GBE0_AUXTS */ - PAD_CFG_NF(GPP_T7, NONE, DEEP, NF1), /* PSE_GBE0_PPS */ PAD_CFG_NF(GPP_T12, NONE, DEEP, NF2), /* SIO_UART0_RXD */ PAD_CFG_NF(GPP_T13, NONE, DEEP, NF2), /* SIO_UART0_TXD */ @@ -37,7 +30,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_G16, NONE, DEEP, NF1), /* ESPI_IO_1 */ PAD_CFG_NF(GPP_G17, NONE, DEEP, NF1), /* ESPI_IO_2 */ PAD_CFG_NF(GPP_G18, NONE, DEEP, NF1), /* ESPI_IO_3 */ - PAD_CFG_GPI(GPP_G19, UP_20K, PLTRST), /* TPM_IRQ_N */ PAD_CFG_NF(GPP_G20, NONE, DEEP, NF1), /* ESPI_CSO_N */ PAD_CFG_NF(GPP_G21, NONE, DEEP, NF1), /* ESPI_CLK */ PAD_CFG_NF(GPP_G22, NONE, DEEP, NF1), /* ESPI_RST0_N */ @@ -54,13 +46,9 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_V8, UP_20K, DEEP, NF1), /* EMMC_DATA7 */ PAD_CFG_NF(GPP_V9, DN_20K, DEEP, NF1), /* EMMC_RCLK */ PAD_CFG_NF(GPP_V10, DN_20K, DEEP, NF1), /* EMMC_CLK */ - PAD_CFG_NF(GPP_V11, NONE, DEEP, NF1), /* EMMC_RESET_N */ + PAD_CFG_NF(GPP_V11, NONE, DEEP, NF1), /* EMMC_RESET */ /* Community 1 - GpioGroup GPP_H */ - PAD_CFG_NF(GPP_H0, DN_20K, DEEP, NF1), /* PSE_GBE1_INT */ - PAD_CFG_NF(GPP_H1, DN_20K, DEEP, NF1), /* PSE_GBE1_RST_N */ - PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1), /* PSE_GBE1_AUXTS */ - PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1), /* PSE_GBE1_PPS */ PAD_CFG_NF(GPP_H8, UP_20K, DEEP, NF1), /* SIO_I2C4_SDA */ PAD_CFG_NF(GPP_H9, UP_20K, DEEP, NF1), /* SIO_I2C4_SCL */ @@ -68,52 +56,29 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPO(GPP_D16, 0, DEEP), /* EMMC_PWR_EN_N */ /* Community 1 - GpioGroup GPP_U */ - PAD_CFG_NF(GPP_U0, DN_20K, DEEP, NF1), /* GBE_INT */ - PAD_CFG_NF(GPP_U1, DN_20K, DEEP, NF1), /* GBE_RST_N */ - PAD_CFG_NF(GPP_U2, NONE, DEEP, NF1), /* GBE_PPS */ - PAD_CFG_NF(GPP_U3, NONE, DEEP, NF1), /* GBE_AUXTS */ PAD_NC(GPP_U12, NONE), /* Not connected */ PAD_NC(GPP_U13, NONE), /* Not connected */ PAD_NC(GPP_U16, NONE), /* Not connected */ PAD_NC(GPP_U17, NONE), /* Not connected */ PAD_NC(GPP_U18, NONE), /* Not connected */ - PAD_CFG_GPO(GPP_U19, 1, DEEP), /* UPD_REQ_N */ /* Community 2 - GpioGroup DSW */ PAD_CFG_NF(GPD4, NONE, PLTRST, NF1), /* SLP_S3 */ PAD_CFG_NF(GPD5, NONE, PLTRST, NF1), /* SLP_S4 */ PAD_NC(GPD7, NONE), /* Not connected */ + PAD_NC(GPD9, NONE), /* Not connected */ PAD_CFG_NF(GPD10, NONE, PLTRST, NF1), /* SLP_S5 */ + PAD_NC(GPD11, NONE), /* Not connected */ /* Community 3 - GpioGroup GPP_S */ PAD_NC(GPP_S0, NONE), /* Not connected */ PAD_NC(GPP_S1, NONE), /* Not connected */ - /* Community 3 - GpioGroup GPP_A */ - PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_TXD3 */ - PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_TXD2 */ - PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_TXD1 */ - PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_TXD0 */ - PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_TXCLK */ - PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_TXCTL */ - PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_RXCLK */ - PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_RXD3 */ - PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_RXD2 */ - PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_RXD1 */ - PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_RXD0 */ - PAD_CFG_NF(GPP_A23, NONE, DEEP, NF1), /* PSE_GBE0_RGMII_RXCTL */ - /* Community 4 - GpioGroup GPP_C */ - PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* PSE_GBE0_MDC */ - PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* PSE_GBE0_MDIO */ PAD_NC(GPP_C5, NONE), /* Not connected */ - PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* PSE_GBE1_MDC */ - PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* PSE_GBE1_MDIO */ PAD_NC(GPP_C8, NONE), /* Not connected */ PAD_CFG_NF(GPP_C12, NONE, DEEP, NF4), /* SIO_UART1_RXD */ PAD_CFG_NF(GPP_C13, NONE, DEEP, NF4), /* SIO_UART1_TXD */ - PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* GBE_MDIO */ - PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* GBE_MDC */ PAD_CFG_NF(GPP_C18, NONE, DEEP, NF4), /* SIO_I2C1_SDA */ PAD_CFG_NF(GPP_C19, NONE, DEEP, NF4), /* SIO_I2C1_SCL */ @@ -139,20 +104,15 @@ static const struct pad_config gpio_table[] = { /* Community 4 - GpioGroup GPP_E */ PAD_CFG_NF(GPP_E0, NONE, DEEP, NF1), /* SATA_LED_N */ - PAD_CFG_NF(GPP_E3, NONE, DEEP, NF1), /* DDI1_HPD */ - PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* DDI1_DDC_SDA */ PAD_NC(GPP_E6, NONE), /* Not connected */ - PAD_CFG_NF(GPP_E7, NONE, DEEP, NF1), /* DDI1_DDC_SCL */ - PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* DDI0_HPD */ PAD_NC(GPP_E15, NONE), /* Not connected */ PAD_NC(GPP_E16, NONE), /* Not connected */ - PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1), /* DDI0_DDC_SDA */ - PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1), /* DDI0_DDC_SCL */ + PAD_NC(GPP_E18, NONE), /* Not connected */ + PAD_NC(GPP_E19, NONE), /* Not connected */ PAD_NC(GPP_E23, NONE), /* Not connected */ /* Community 5 - GpioGroup GPP_R */ PAD_NC(GPP_R1, NONE), /* Not connected */ - PAD_NC(GPP_R2, NONE), /* Not connected */ PAD_NC(GPP_R3, NONE), /* Not connected */ }; |