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author | Subrata Banik <subratabanik@google.com> | 2022-01-28 23:24:57 +0530 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-03 13:48:56 +0000 |
commit | 92b78157022b0bd0777f84138f26ba879cef1028 (patch) | |
tree | 179f0cf2f69ba7e9341479bc5397a64cefa73f82 /src/mainboard/siemens | |
parent | cfd32241978840e8d464a089d59a093ad0301d6f (diff) |
soc/intel/cannonlake: Forbid FSP from disabling HECI1
The functionality of disabling HECI1 device has been moved from the
FSP to coreboot (using `DISABLE_HECI1_AT_PRE_BOOT` config), hence,
always set the `Heci1Disabled` UPD to `0`.
BUG=none
TEST=Boot to OS, verify HECI1 is disabled on hatch system
using coreboot when mainboard selects DISABLE_HECI1_AT_PRE_BOOT config.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ia8908c080ca9991e7a71e795ccb8fc76d99514f8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/mainboard/siemens')
0 files changed, 0 insertions, 0 deletions