diff options
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2021-08-25 15:36:31 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-14 13:07:04 +0000 |
| commit | 71b227d6ebddd1236473c62c2d7f340ebd9981b5 (patch) | |
| tree | 469a6f4bade89563d431369040758a284482c4f2 /src/mainboard/siemens | |
| parent | 76b4e414f30e155d86d2d86d91c887b9f15dce27 (diff) | |
mb/siemens/mc_ehl2: Adjust PCH serial IO settings
Correct the PCH serial IO settings, suitable for this mainboard.
Change-Id: I3c9915b2d52fbc6a15ac1e68c77bfb3983f7b1cd
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens')
| -rw-r--r-- | src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb | 23 |
1 files changed, 6 insertions, 17 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 9d037cad6b..451c5dd5f2 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -98,30 +98,19 @@ chip soc/intel/elkhartlake # LPSS Serial IO (I2C/UART/GSPI) related UPDs register "SerialIoI2cMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoDisabled, - [PchSerialIoIndexI2C1] = PchSerialIoPci, - [PchSerialIoIndexI2C2] = PchSerialIoDisabled, - [PchSerialIoIndexI2C3] = PchSerialIoDisabled, + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoDisabled, + [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexI2C6] = PchSerialIoDisabled, [PchSerialIoIndexI2C7] = PchSerialIoDisabled, }" - register "SerialIoI2cPadsTermination" = "{ - [PchSerialIoIndexI2C0] = 1, - [PchSerialIoIndexI2C1] = 1, - [PchSerialIoIndexI2C2] = 1, - [PchSerialIoIndexI2C3] = 1, - [PchSerialIoIndexI2C4] = 1, - [PchSerialIoIndexI2C5] = 1, - [PchSerialIoIndexI2C6] = 1, - [PchSerialIoIndexI2C7] = 1, - }" - register "SerialIoUartMode" = "{ - [PchSerialIoIndexUART0] = PchSerialIoDisabled, - [PchSerialIoIndexUART1] = PchSerialIoDisabled, + [PchSerialIoIndexUART0] = PchSerialIoPci, + [PchSerialIoIndexUART1] = PchSerialIoPci, [PchSerialIoIndexUART2] = PchSerialIoSkipInit, }" |