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authorMario Scheithauer <mario.scheithauer@siemens.com>2024-09-16 10:56:40 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-09-18 21:54:07 +0000
commit5d96f0d2e8c166d63e409ff4684cb445458f4c3e (patch)
treed20e8a78808028be4b0fd99a7c58b82d2f0cb220 /src/mainboard/siemens
parent0f9de13d3a9d55af08956fccef05e674f16d24b3 (diff)
mb/siemens/{mc_ehl2,mc_ehl3,mc_ehl5}: Enable real-time tuning in FSP
The real-time feature should also be activated for all mc_ehl mainboards, as it has already been done for mainboard mc_ehl1. It improves performance in the real-time environment for these mainboards. Change-Id: I04859b2f32bc11344b0620925f2414e7a6df625e Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84391 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/siemens')
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb3
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb3
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb3
3 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
index abad9c7037..67ece6d158 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
@@ -133,6 +133,9 @@ chip soc/intel/elkhartlake
# Disable L1 prefetcher for real-time demands
register "L1_prefetcher_disable" = "true"
+ # Enable real-time tuning
+ register "realtime_tuning_enable" = "true"
+
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb
index db12aa36eb..54bd62b0f1 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb
@@ -135,6 +135,9 @@ chip soc/intel/elkhartlake
# Disable L1 prefetcher for real-time demands
register "L1_prefetcher_disable" = "true"
+ # Enable real-time tuning
+ register "realtime_tuning_enable" = "true"
+
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
index 8fe9b93dd1..5998e0e09d 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
@@ -133,6 +133,9 @@ chip soc/intel/elkhartlake
# Disable L1 prefetcher for real-time demands
register "L1_prefetcher_disable" = "true"
+ # Enable real-time tuning
+ register "realtime_tuning_enable" = "true"
+
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device