diff options
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2020-10-01 12:49:50 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2020-10-05 05:11:03 +0000 |
| commit | 8725c0af0949e004f642786b106a4f1da49064ff (patch) | |
| tree | 35f4b65d46bf560aaf9c316cb355e63589ed4bf5 /src/mainboard/siemens | |
| parent | 6577ec4de4290d3adbf5fbdc31b09b38c09100cf (diff) | |
mb/siemens/mc_apl6: Enable eMMC
Enable eMMC with HS200 mode for mc_apl6 mainboard.
TEST: Linux booted and checked with 'lspci'.
Change-Id: Ib760a1a26a92047e8916979ffb5001bcff0a6e45
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45898
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/siemens')
| -rw-r--r-- | src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb index 4aa8bc92d5..024f2c5e07 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb @@ -14,6 +14,9 @@ chip soc/intel/apollolake register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED" + # 0:HS400(Default), 1:HS200, 2:DDR50 + register "emmc_host_max_speed" = "1" + # Enable Vtd feature register "enable_vtd" = "1" @@ -70,7 +73,7 @@ chip soc/intel/apollolake device pci 19.2 off end # - SPI 2 device pci 1a.0 off end # - PWM device pci 1b.0 on end # - SDCARD - device pci 1c.0 off end # - eMMC + device pci 1c.0 on end # - eMMC device pci 1d.0 off end # - UFS device pci 1e.0 off end # - SDIO device pci 1f.0 on # - LPC |