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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-07-07 23:42:58 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-07-08 13:54:47 +0200
commit7974471e379e3aaefc0ecd5524c408e69537444b (patch)
tree4b01576406def94a93142f98a4639a7244dbbd12 /src/mainboard/siemens
parent1f19d3494142bd12fa6d75f5761865346da5bcc5 (diff)
mainboard: Trivial - drop trailing blank lines at EOF
Change-Id: I05d6d22664155ac8478e665733f816776e277c22 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6200 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/siemens')
-rw-r--r--src/mainboard/siemens/sitemp_g1p1/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c
index eca7af23f2..33329991f1 100644
--- a/src/mainboard/siemens/sitemp_g1p1/romstage.c
+++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c
@@ -192,4 +192,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_cache_as_ram();
}
-