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authorMario Scheithauer <mario.scheithauer@siemens.com>2023-01-25 14:32:39 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-03-02 16:15:18 +0000
commitb63b6c5ff5a4054512c0c91c215566a8d4614ffb (patch)
tree7656e18a1ddbf8ec5dea00ea101ef07a9ff5177b /src/mainboard/siemens
parentba8c80cb56790cf184c107a5f3a6b2fd2d0015d8 (diff)
mb/siemens/mc_ehl4: Remove TPM from devicetree and Kconfig
This mainboard does not use security features like TPM. Change-Id: Ieebbf12fc844573ffadb089da78062dd2033517a Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens')
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig4
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb6
2 files changed, 1 insertions, 9 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig
index 9ea2fe84f9..ee725cc71b 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig
@@ -6,10 +6,6 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVER_INTEL_I210
select INTEL_LPSS_UART_FOR_CONSOLE
select NC_FPGA_POST_CODE
- select MAINBOARD_HAS_TPM2
- select MEMORY_MAPPED_TPM
- select TPM_MEASURED_BOOT
- select TPM_MEASURED_BOOT_INIT_BOOTBLOCK
config FMDFILE
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/mc_ehl.fmd"
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb
index 4e2fffc544..f9dd8302ad 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb
@@ -165,11 +165,7 @@ chip soc/intel/elkhartlake
device pci 1e.1 on end # UART1
- device pci 1f.0 on # eSPI Interface
- chip drivers/pc80/tpm
- device pnp 0c31.0 on end
- end
- end
+ device pci 1f.0 on end # eSPI Interface
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.4 on # SMBus
# Enable external RTC chip