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authorMario Scheithauer <mario.scheithauer@siemens.com>2019-07-17 10:35:00 +0200
committerWerner Zeh <werner.zeh@siemens.com>2019-07-18 11:46:50 +0000
commit2c7d1848856ce7bd8539ed4af460a476c39ff2fb (patch)
tree1034d2ac269307698ae5548b8f658c4833106173 /src/mainboard/siemens
parent7815c074b4689d858fde7c8e02153c40de79645e (diff)
mb/siemens/{mc_apl1,...,mc_apl5}: Fix GPIO settings
Correct all GPIOs with reference to the Apollo Lake SoC EDS Vol 4 revision 2.4 chapter 10.1.2.3 List of Pins that are GPIOs but cannot be used in Function 0 (GPIO) mode. In additional, set an internal pull to any GPI that does not have an external resistor so that the input is not in an undefined state. Change-Id: Ia8fe457eddbed0f4ee6bff9ef9dd7a92545be40b Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34379 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com>
Diffstat (limited to 'src/mainboard/siemens')
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c14
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c6
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c22
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c4
4 files changed, 23 insertions, 23 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
index 91a30bfe0e..dd9736401a 100644
--- a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c
@@ -47,12 +47,12 @@ static const struct pad_config gpio_table[] = {
/* SDIO -- unused */
PAD_CFG_GPI(GPIO_166, DN_20K, DEEP), /* SDIO_CLK */
- PAD_CFG_GPI(GPIO_167, NONE, DEEP), /* SDIO_D0 */
+ PAD_CFG_GPI(GPIO_167, DN_20K, DEEP), /* SDIO_D0 */
/* Configure SDIO to enable power gating. */
PAD_CFG_NF(GPIO_168, UP_20K, DEEP, NF1), /* SDIO_D1 */
- PAD_CFG_GPI(GPIO_169, NONE, DEEP), /* SDIO_D2 */
- PAD_CFG_GPI(GPIO_170, NONE, DEEP), /* SDIO_D3 */
- PAD_CFG_GPI(GPIO_171, NONE, DEEP), /* SDIO_CMD */
+ PAD_CFG_GPI(GPIO_169, DN_20K, DEEP), /* SDIO_D2 */
+ PAD_CFG_GPI(GPIO_170, DN_20K, DEEP), /* SDIO_D3 */
+ PAD_CFG_GPI(GPIO_171, DN_20K, DEEP), /* SDIO_CMD */
/* SDCARD */
/* Pull down clock by 20K. */
@@ -135,7 +135,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(OSC_CLK_OUT_4, DN_20K, DEEP),
/* PMU Signals */
- PAD_CFG_GPI(PMU_AC_PRESENT, NONE, DEEP), /* PMU_AC_PRESENT */
+ PAD_CFG_GPI(PMU_AC_PRESENT, DN_20K, DEEP), /* PMU_AC_PRESENT */
PAD_CFG_NF(PMU_BATLOW_B, UP_20K, DEEP, NF1), /* PMU_BATLOW_N */
PAD_CFG_NF(PMU_PLTRST_B, NONE, DEEP, NF1), /* PMU_PLTRST_N */
PAD_CFG_NF(PMU_PWRBTN_B, NONE, DEEP, NF1), /* PMU_PWRBTN_N */
@@ -173,7 +173,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPIO_198, DN_20K, DEEP), /* PNL1_BKLTCTL */
/* DDI[0:1]_HPD -- unused */
- PAD_CFG_GPI(GPIO_199, NONE, DEEP), /* XHPD_DP */
+ PAD_CFG_GPI(GPIO_199, DN_20K, DEEP), /* XHPD_DP */
PAD_CFG_GPI(GPIO_200, DN_20K, DEEP), /* unused */
/* MDSI signals -- unused */
@@ -193,7 +193,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(PMC_SPI_CLK, DN_20K, DEEP),
/* PMIC Signals unused signals related to an old PMIC interface. */
- PAD_CFG_GPO(PMIC_PWRGOOD, 1, DEEP), /* PMIC_PWRGOOD */
+ PAD_CFG_NF(PMIC_PWRGOOD, UP_20K, DEEP, NF1), /* PMIC_PWRGOOD */
PAD_CFG_GPI(PMIC_RESET_B, DN_20K, DEEP), /* PMIC_RESET_B */
PAD_CFG_TERM_GPO(GPIO_213, 0, DN_20K, DEEP), /* NFC_OUT_RESERVE */
PAD_CFG_TERM_GPO(GPIO_214, 0, DN_20K, DEEP), /* NFC_EN */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
index d1ca6793ea..b316d9727d 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
@@ -123,9 +123,9 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, UP_1K, DEEP, NF1, Tx1RxDCRx1,
MASK),
/* Not connected */
- PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_134, NONE, DEEP, Tx0RxDCRx0, MASK),
+ PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_134, UP_20K, DEEP, Tx0RxDCRx0, MASK),
/* Not connected */
- PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_135, NONE, DEEP, Tx0RxDCRx0, MASK),
+ PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_135, UP_20K, DEEP, Tx0RxDCRx0, MASK),
/* GPIO_PWRBTN# */
PAD_CFG_GPI_SCI_IOS(GPIO_136, UP_20K, DEEP, EDGE_SINGLE, INVERT,
TxDRxE, SAME),
@@ -276,7 +276,7 @@ static const struct pad_config gpio_table[] = {
SAME),
/* Not connected */
- PAD_CFG_GPO_GPIO_DRIVER(PMIC_PWRGOOD, 1, DEEP, UP_1K),
+ PAD_CFG_NF(PMIC_PWRGOOD, UP_20K, DEEP, NF1),
PAD_CFG_GPO_GPIO_DRIVER(GPIO_214, 1, DEEP, DN_20K),
PAD_CFG_GPO_GPIO_DRIVER(GPIO_215, 1, DEEP, DN_20K),
/* THERMTRIP_1V8# - Connected to CPLD */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c
index c7262cad9e..492dae6418 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/gpio.c
@@ -178,7 +178,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(PMC_SPI_CLK, DN_20K, DEEP), /* unused */
/* PMIC Signals unused signals related to an old PMIC interface. */
- PAD_CFG_GPI(PMIC_PWRGOOD, DN_20K, DEEP), /* PMIC_PWRGOOD */
+ PAD_CFG_NF(PMIC_PWRGOOD, DN_20K, DEEP, NF1), /* PMIC_PWRGOOD */
PAD_CFG_GPI(PMIC_RESET_B, DN_20K, DEEP), /* PMIC_RESET_B */
PAD_CFG_GPI(GPIO_213, UP_20K, DEEP), /* PMIC_SDWN_B */
PAD_CFG_GPI(GPIO_214, DN_20K, DEEP), /* PMIC_BCUDISW2 */
@@ -318,16 +318,16 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPIO_73, DN_20K, DEEP), /* pin open */
/* no TAP controller pins available on SMARC of APL4 */
- PAD_CFG_GPI(TCK, DN_20K, DEEP), /* pin open */
- PAD_CFG_GPI(TRST_B, DN_20K, DEEP), /* pin open */
- PAD_CFG_GPI(TMS, DN_20K, DEEP), /* pin open */
- PAD_CFG_GPI(TDI, DN_20K, DEEP), /* pin open */
+ PAD_CFG_NF(TCK, DN_20K, DEEP, NF1), /* pin open */
+ PAD_CFG_NF(TRST_B, DN_20K, DEEP, NF1), /* pin open */
+ PAD_CFG_NF(TMS, DN_20K, DEEP, NF1), /* pin open */
+ PAD_CFG_NF(TDI, DN_20K, DEEP, NF1), /* pin open */
- PAD_CFG_GPI(CX_PMODE, DN_20K, DEEP), /* pin open */
- PAD_CFG_GPI(CX_PREQ_B, DN_20K, DEEP), /* pin open */
- PAD_CFG_GPI(JTAGX, DN_20K, DEEP), /* pin open */
- PAD_CFG_GPI(CX_PRDY_B, DN_20K, DEEP), /* pin open */
- PAD_CFG_GPI(TDO, DN_20K, DEEP), /* pin open */
+ PAD_CFG_NF(CX_PMODE, DN_20K, DEEP, NF1), /* pin open */
+ PAD_CFG_NF(CX_PREQ_B, DN_20K, DEEP, NF1), /* pin open */
+ PAD_CFG_NF(JTAGX, DN_20K, DEEP, NF1), /* pin open */
+ PAD_CFG_NF(CX_PRDY_B, DN_20K, DEEP, NF1), /* pin open */
+ PAD_CFG_NF(TDO, DN_20K, DEEP, NF1), /* pin open */
/* GPIO_[216:219] described into EDS Vol1. */
PAD_CFG_GPO(CNV_BRI_DT, 0, DEEP), /* Disable eDP to LVDS bridge */
@@ -335,7 +335,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(CNV_RGI_DT, DN_20K, DEEP), /* pin open */
/* Writing to following GPIO registers leads to 0xFFFF FFFF in CFG0/1 */
- PAD_CFG_GPI(CNV_RGI_RSP, DN_20K, DEEP), /* pin open */
+ PAD_CFG_NF(CNV_RGI_RSP, DN_20K, DEEP, NF1), /* pin open */
/* Serial Voltage Identification */
PAD_CFG_NF(SVID0_ALERT_B, NONE, DEEP, NF1), /* SVID0_ALERT_B */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c
index 1fb0c89b78..f6578cb866 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c
@@ -135,7 +135,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(OSC_CLK_OUT_4, DN_20K, DEEP),
/* PMU Signals */
- PAD_CFG_GPI(PMU_AC_PRESENT, NONE, DEEP), /* PMU_AC_PRESENT */
+ PAD_CFG_GPI(PMU_AC_PRESENT, DN_20K, DEEP), /* PMU_AC_PRESENT */
PAD_CFG_NF(PMU_BATLOW_B, UP_20K, DEEP, NF1), /* PMU_BATLOW_N */
PAD_CFG_NF(PMU_PLTRST_B, NONE, DEEP, NF1), /* PMU_PLTRST_N */
PAD_CFG_NF(PMU_PWRBTN_B, NONE, DEEP, NF1), /* PMU_PWRBTN_N */
@@ -193,7 +193,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(PMC_SPI_CLK, DN_20K, DEEP),
/* PMIC Signals unused signals related to an old PMIC interface. */
- PAD_CFG_GPO(PMIC_PWRGOOD, 1, DEEP), /* PMIC_PWRGOOD */
+ PAD_CFG_NF(PMIC_PWRGOOD, UP_20K, DEEP, NF1), /* PMIC_PWRGOOD */
PAD_CFG_GPI(PMIC_RESET_B, DN_20K, DEEP), /* PMIC_RESET_B */
PAD_CFG_TERM_GPO(GPIO_213, 0, DN_20K, DEEP), /* NFC_OUT_RESERVE */
PAD_CFG_TERM_GPO(GPIO_214, 0, DN_20K, DEEP), /* NFC_EN */