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author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-09-30 10:27:01 +0530 |
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committer | Karthik Ramasubramanian <kramasub@google.com> | 2020-10-08 19:43:56 +0000 |
commit | b5e4e3441841d8d1b7fac1240b7c73d288df66d5 (patch) | |
tree | 9d03c495a66e83f54f45797f154323d68d86991c /src/mainboard/siemens | |
parent | 833b5b33d2fe330873c2412193113bc4ff3fc5f3 (diff) |
mb/google/dedede/variants/drawcia: Update TSR1 passive trip temperature
Update TSR1 passive trip temperature
BUG=b:169691800
BRANCH=None
TEST=Built and tested on dedede system
Change-Id: I172391daca981d5591fa9cc5eacad92521dd0dc5
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45859
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/mainboard/siemens')
0 files changed, 0 insertions, 0 deletions