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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-05-02 17:27:57 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2019-06-06 17:57:40 +0000 |
commit | 251d305e73f76ca3b63654273f3b2bb3de775457 (patch) | |
tree | 76cf206b9b73033c21569005f12f80f1df7bbcbf /src/mainboard/siemens/mc_apl1 | |
parent | eb5b0d05a71ec04d69699edebb6e71be2bb6ed09 (diff) |
soc/amd/stoneyridge: Move GPIO support to common
The banked GPIO functionality in the AcpiMmio block has been consistent
since the Mullins product. Move the basic support into a common
directory.
Each product's pin availability, MUXes, and other details must remain
specific to the product.
The relocated source also drops the weak configure_gevent_smi() that
reports SMI is not available. The stoneyridge port relies on SMI
to do its initialization, similar to modern soc/intel devices. This
is the plan for future soc/amd ports, so make a missing function a
build error instead of a runtime warning.
BUG=b:131682806
Change-Id: I9cda00210a74de2bd1308ad43e2b867d24a67845
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32651
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1')
0 files changed, 0 insertions, 0 deletions