diff options
author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2019-07-10 14:34:50 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2019-07-11 15:14:32 +0000 |
commit | 6c7857411c9a7572f5bdb29cc6e1ffd01d023cb2 (patch) | |
tree | 986cf393097d1b9810d179544c3952e5bffb5760 /src/mainboard/siemens/mc_apl1/variants/baseboard | |
parent | 1f21a96c842c285308fd0b433a578ce101483aa1 (diff) |
mb/siemens/{baseboard,mc_apl3,mc_apl4,mc_apl5}: Fix GPIO_168
This GPIO is corrected with reference to the Apollo Lake SoC EDS Vol 4
revision 2.4 chapter 10.1.2.3 List of Pins that are GPIOs but cannot be
used in Function 0 (GPIO) mode.
Change-Id: I98628ade3a1e19730ca6e6b4a63c28e6816176ce
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34197
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1/variants/baseboard')
-rw-r--r-- | src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c index 5ca91efece..91a30bfe0e 100644 --- a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c +++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c @@ -49,7 +49,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPIO_166, DN_20K, DEEP), /* SDIO_CLK */ PAD_CFG_GPI(GPIO_167, NONE, DEEP), /* SDIO_D0 */ /* Configure SDIO to enable power gating. */ - PAD_CFG_GPI(GPIO_168, NONE, DEEP), /* SDIO_D1 */ + PAD_CFG_NF(GPIO_168, UP_20K, DEEP, NF1), /* SDIO_D1 */ PAD_CFG_GPI(GPIO_169, NONE, DEEP), /* SDIO_D2 */ PAD_CFG_GPI(GPIO_170, NONE, DEEP), /* SDIO_D3 */ PAD_CFG_GPI(GPIO_171, NONE, DEEP), /* SDIO_CMD */ |