diff options
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2017-02-06 13:03:52 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-02-15 21:38:03 +0100 |
| commit | 6abdbcd4dc19f3fc2344ffcd9e3790e2a708d6b2 (patch) | |
| tree | 6fa6b16c80eecf122def8012d63073b0fc821cf1 /src/mainboard/siemens/mc_apl1/brd_gpio.h | |
| parent | d0966d86d68795b64d3cf54af909339b74be1b6e (diff) | |
siemens/mc_apl1: Make basic settings for booting the mainboard
This commit makes a basic adjustment for GPIOs, device tree, flash map and
MRC settings. With these basic settings the mainboard boots into
Linux lubuntu 4.8.0-22-generic using SeaBIOS. More adjustments will follow.
Change-Id: Ia920d236814f2e6a9b777dd1e4b4feef0ddf7721
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/18292
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1/brd_gpio.h')
| -rw-r--r-- | src/mainboard/siemens/mc_apl1/brd_gpio.h | 38 |
1 files changed, 15 insertions, 23 deletions
diff --git a/src/mainboard/siemens/mc_apl1/brd_gpio.h b/src/mainboard/siemens/mc_apl1/brd_gpio.h index 33b839bbca..564ee69504 100644 --- a/src/mainboard/siemens/mc_apl1/brd_gpio.h +++ b/src/mainboard/siemens/mc_apl1/brd_gpio.h @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2015-2016 Intel Corporation. All Rights Reserved. + * Copyright (C) 2017 Siemens AG * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,11 +19,7 @@ #if ENV_ROMSTAGE static const struct pad_config gpio_table[] = { - PAD_CFG_NF(GPIO_134, NATIVE, DEEP, NF2), /* ISH_I2C0_SDA/IO-OD */ - PAD_CFG_NF(GPIO_135, NATIVE, DEEP, NF2), /* ISH_I2C0_SCL/IO-OD */ - PAD_CFG_NF(GPIO_136, NATIVE, DEEP, NF2), /* ISH_I2C1_SDA/IO-OD */ - PAD_CFG_NF(GPIO_137, NATIVE, DEEP, NF2), /* ISH_I2C1_SCL/IO-OD */ - + /* Debug tracing. */ PAD_CFG_NF(GPIO_0, NATIVE, DEEP, NF1), PAD_CFG_NF(GPIO_1, NATIVE, DEEP, NF1), PAD_CFG_NF(GPIO_2, NATIVE, DEEP, NF1), @@ -33,30 +30,25 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPIO_7, NATIVE, DEEP, NF1), PAD_CFG_NF(GPIO_8, NATIVE, DEEP, NF1), - /* EXP_I2C_SDA and I2C_PSS_SDA and I2C_2_SDA_IOEXP */ - PAD_CFG_NF(GPIO_7, NATIVE, DEEP, NF1), - /* EXP_I2C_SCL and I2C_PSS_SCL and I2C_2_SCL_IOEXP */ - PAD_CFG_NF(GPIO_8, NATIVE, DEEP, NF1), - - PAD_CFG_GPO(GPIO_152, 0, DEEP), /* PERST# */ - PAD_CFG_GPO(GPIO_19, 1, DEEP), /* PFET */ - PAD_CFG_GPO(GPIO_13, 0, DEEP), /* PERST# */ - PAD_CFG_GPO(GPIO_17, 1, DEEP), /* PFET */ - PAD_CFG_GPO(GPIO_15, 0, DEEP), /* PERST# */ + PAD_CFG_GPI(GPIO_152, DN_20K, DEEP), /* Unused */ + PAD_CFG_GPI(GPIO_19, UP_20K, DEEP), /* Unused */ + PAD_CFG_GPI(GPIO_13, UP_20K, DEEP), /* Unused */ + PAD_CFG_GPI(GPIO_17, UP_20K, DEEP), /* Unused */ + PAD_CFG_GPI(GPIO_15, UP_20K, DEEP), /* Unused */ PAD_CFG_NF(GPIO_210, NATIVE, DEEP, NF1), /* CLKREQ# */ PAD_CFG_NF(SMB_CLK, NATIVE, DEEP, NF1), PAD_CFG_NF(SMB_DATA, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_ILB_SERIRQ, NATIVE, DEEP, NF1), + PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), PAD_CFG_NF(LPC_CLKOUT0, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_CLKOUT1, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_AD0, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_AD1, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_AD2, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_AD3, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_CLKRUNB, NATIVE, DEEP, NF1), - PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1), + PAD_CFG_GPI(LPC_CLKOUT1, UP_20K, DEEP), /* LPC_CLKOUT1 -- unused */ + PAD_CFG_NF(LPC_AD0, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_AD1, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_AD2, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_AD3, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1), + PAD_CFG_NF(LPC_FRAMEB, UP_20K, DEEP, NF1), }; #endif |