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authorKeith Hui <buurin@gmail.com>2024-02-05 19:18:43 -0500
committerMartin L Roth <gaumless@gmail.com>2024-06-08 00:19:23 +0000
commita911b758482025d46e132eeb2ed0279b65692075 (patch)
treefb8475ef03a0365132fefb82bc248468ef0a4784 /src/mainboard/sapphire
parentee126348726b24fbf6e5435bb2cf15417959a8f7 (diff)
mb/*: Remove old USB configurations from SNB/bd82x6x boards
Remove USB configurations and data structures from northbridge devicetree (SNB+MRC boards) and bootblock/romstage C code (native-only SNB boards). All USB configurations are drawn from southbridge devicetree going forward. Change-Id: Ie1cd21077136998a6e90050c95263f2efed68a67 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81882 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/sapphire')
-rw-r--r--src/mainboard/sapphire/pureplatinumh61/early_init.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/src/mainboard/sapphire/pureplatinumh61/early_init.c b/src/mainboard/sapphire/pureplatinumh61/early_init.c
index 8749e49925..b4bc1119f2 100644
--- a/src/mainboard/sapphire/pureplatinumh61/early_init.c
+++ b/src/mainboard/sapphire/pureplatinumh61/early_init.c
@@ -8,20 +8,3 @@ void mainboard_pch_lpc_setup(void)
{
pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xac, 0x00010000);
}
-
-const struct southbridge_usb_port mainboard_usb_ports[] = {
- { 1, 0, 0 },
- { 1, 0, 0 },
- { 1, 0, 1 },
- { 1, 0, 1 },
- { 1, 0, 2 },
- { 1, 0, 2 },
- { 1, 0, 3 },
- { 1, 0, 3 },
- { 1, 0, 4 },
- { 1, 0, 4 },
- { 1, 0, 6 },
- { 1, 0, 5 },
- { 1, 0, 5 },
- { 1, 0, 6 },
-};