diff options
| author | Joel Kitching <kitching@google.com> | 2020-03-05 19:21:56 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-07 20:31:49 +0000 |
| commit | 7fa1d9de5c1d8275f49493a39f16b08179f179cb (patch) | |
| tree | 4c33d3578009e3b85ab4d5d01e13111cf6422c2c /src/mainboard/samsung | |
| parent | 11bf9df9ac73449d3291e927771abbbbcd4af145 (diff) | |
chromeos: stop sharing write protect GPIO with depthcharge
wpsw_boot is deprecated in favour of wpsw_cur. As such,
coreboot no longer needs to share "write protect" GPIO
with depthcharge.
BUG=b:124141368, chromium:950273
TEST=make clean && make test-abuild
BRANCH=none
Change-Id: I2fcb7f82aa063fd72928171af5cbef0356ba620c
Signed-off-by: Joel Kitching <kitching@google.com>
Cq-Depend: chromium:2088434
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39318
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/samsung')
| -rw-r--r-- | src/mainboard/samsung/lumpy/chromeos.c | 4 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/chromeos.c | 4 |
2 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index 342f7a968a..5b58144fa3 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -38,10 +38,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) u8 lid = ec_read(0x83); struct lb_gpio chromeos_gpios[] = { - /* Write Protect: GPIO24 = KBC3_SPI_WP# */ - {GPIO_SPI_WP, ACTIVE_HIGH, get_write_protect_state(), - "write protect"}, - /* Recovery: GPIO42 = CHP3_REC_MODE# */ {GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(), "presence"}, diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index 955ba5a620..36efb8af64 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -33,10 +33,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1); struct lb_gpio chromeos_gpios[] = { - /* Write Protect: GPIO68 = CHP3_SPI_WP */ - {GPIO_SPI_WP, ACTIVE_HIGH, get_write_protect_state(), - "write protect"}, - /* Recovery: GPIO42 = CHP3_REC_MODE# */ {GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(), "presence"}, |