diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-22 16:49:28 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-04-23 22:21:11 +0000 |
| commit | a4faec3b014b54d4619dad31c6d6ede58700d862 (patch) | |
| tree | dc39875d437a0f357d1e142644d1108b83138ce2 /src/mainboard/samsung | |
| parent | cfdac8266155e7aafdc658e415eb719639670ed8 (diff) | |
src/mainboard: Const'ify pci_devfn_t devices
Change-Id: I5bb1a819475383719dbda32d9b5fea63da1e6713
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40611
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/samsung')
| -rw-r--r-- | src/mainboard/samsung/lumpy/chromeos.c | 8 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/chromeos.c | 8 |
2 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index 0d5c0f6a07..c306e56080 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -21,7 +21,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { - pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); + const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1); u8 lid = ec_read(0x83); @@ -44,20 +44,20 @@ void fill_lb_gpios(struct lb_gpios *gpios) int get_write_protect_state(void) { - pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); + const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); return (pci_s_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; } int get_recovery_mode_switch(void) { - pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); + const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); return (pci_s_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; } void init_bootmode_straps(void) { u32 flags = 0; - pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); + const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); /* Write Protect: GPIO24 = KBC3_SPI_WP#, active high */ if (get_gpio(GPIO_SPI_WP)) diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index ac889ec11c..38808dbb14 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -17,7 +17,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { - pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); + const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1); struct lb_gpio chromeos_gpios[] = { @@ -40,20 +40,20 @@ void fill_lb_gpios(struct lb_gpios *gpios) int get_write_protect_state(void) { - pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); + const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); return (pci_s_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; } int get_recovery_mode_switch(void) { - pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); + const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); return (pci_s_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; } void init_bootmode_straps(void) { u32 flags = 0; - pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); + const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); /* Write Protect: GPIO68 = CHP3_SPI_WP, active high */ if (get_gpio(GPIO_SPI_WP)) |