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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-06 20:51:58 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-11 13:17:38 +0000 |
| commit | 0cb116647e27b71f825e260b83a93a1bd1bfcf5e (patch) | |
| tree | c3a5c89e783c6ee01f69ad2412805c013badef08 /src/mainboard/samsung/stumpy/chromeos.c | |
| parent | 6de8b424824069345714001766b389f0b992df8e (diff) | |
samsung/lumpy,stumpy: Refactor ChromeOS GPIOs
Change-Id: Ic8b189dd82c412aa439694e200d530ae7e71d7e2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58997
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/samsung/stumpy/chromeos.c')
| -rw-r--r-- | src/mainboard/samsung/stumpy/chromeos.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index c15233cd26..1ed5d28cad 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -8,9 +8,7 @@ #include <southbridge/intel/common/gpio.h> #include <types.h> #include <vendorcode/google/chromeos/chromeos.h> - -#define GPIO_SPI_WP 68 -#define GPIO_REC_MODE 42 +#include "onboard.h" #define FLAG_SPI_WP 0 #define FLAG_REC_MODE 1 @@ -38,6 +36,16 @@ void fill_lb_gpios(struct lb_gpios *gpios) lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } +static bool raw_write_protect_state(void) +{ + return get_gpio(GPIO_SPI_WP); +} + +static bool raw_recovery_mode_switch(void) +{ + return !get_gpio(GPIO_REC_MODE); +} + int get_write_protect_state(void) { const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); @@ -56,10 +64,11 @@ void init_bootmode_straps(void) const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); /* Write Protect: GPIO68 = CHP3_SPI_WP, active high */ - if (get_gpio(GPIO_SPI_WP)) + if (raw_write_protect_state()) flags |= (1 << FLAG_SPI_WP); + /* Recovery: GPIO42 = CHP3_REC_MODE#, active low */ - if (!get_gpio(GPIO_REC_MODE)) + if (raw_recovery_mode_switch()) flags |= (1 << FLAG_REC_MODE); pci_s_write_config32(dev, SATA_SP, flags); |