diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-07 10:23:36 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-04-09 02:50:01 +0000 |
commit | 7a874330919a4df9cc5b66058b4340465b7ea041 (patch) | |
tree | 7192d50705fde0142ccc3747e712d6641329edd1 /src/mainboard/samsung/lumpy | |
parent | 5619ea2b982003b23bdeb48890981605a6201d67 (diff) |
mb/google,samsung: Drop init_bootmode_straps()
Change-Id: Idcaf30c622bf5dc0f1295f2639c656086d01ff7e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59008
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/samsung/lumpy')
-rw-r--r-- | src/mainboard/samsung/lumpy/chromeos.c | 35 | ||||
-rw-r--r-- | src/mainboard/samsung/lumpy/early_init.c | 5 |
2 files changed, 2 insertions, 38 deletions
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index ba5eabea21..7761c69769 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -4,16 +4,12 @@ #include <boot/coreboot_tables.h> #include <device/pci_ops.h> #include <device/device.h> -#include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include <types.h> #include <vendorcode/google/chromeos/chromeos.h> #include "onboard.h" -#define FLAG_SPI_WP 0 -#define FLAG_REC_MODE 1 - #include "ec.h" #include <ec/smsc/mec1308/ec.h> @@ -36,12 +32,12 @@ void fill_lb_gpios(struct lb_gpios *gpios) lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -static bool raw_write_protect_state(void) +int get_write_protect_state(void) { return get_gpio(GPIO_SPI_WP); } -static bool raw_recovery_mode_switch(void) +int get_recovery_mode_switch(void) { return !get_gpio(GPIO_REC_MODE); } @@ -58,33 +54,6 @@ int get_power_switch(void) return (gen_pmcon_1 >> 9) & 1; } -int get_write_protect_state(void) -{ - const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); - return (pci_s_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; -} - -int get_recovery_mode_switch(void) -{ - const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); - return (pci_s_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; -} - -void init_bootmode_straps(void) -{ - u32 flags = 0; - const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); - - /* Write Protect: GPIO24 = KBC3_SPI_WP#, active high */ - if (raw_write_protect_state()) - flags |= (1 << FLAG_SPI_WP); - /* Recovery: GPIO42 = CHP3_REC_MODE#, active low */ - if (raw_recovery_mode_switch()) - flags |= (1 << FLAG_REC_MODE); - - pci_s_write_config32(dev, SATA_SP, flags); -} - static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AL(GPIO_REC_MODE, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), diff --git a/src/mainboard/samsung/lumpy/early_init.c b/src/mainboard/samsung/lumpy/early_init.c index 26c882624e..fd0f9448eb 100644 --- a/src/mainboard/samsung/lumpy/early_init.c +++ b/src/mainboard/samsung/lumpy/early_init.c @@ -182,11 +182,6 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only) read_spd(&spd[0], 0x50, id_only); } -void mainboard_early_init(int s3resume) -{ - init_bootmode_straps(); -} - int mainboard_should_reset_usb(int s3resume) { return !s3resume; |