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authorPatrick Georgi <patrick.georgi@coresystems.de>2010-10-05 09:07:10 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-10-05 09:07:10 +0000
commitd0835953506263b0d9218b62176693315f2ef2f3 (patch)
tree677ecbe10516269e4870c4ca745cbc4259e8afc0 /src/mainboard/roda
parentcc0dc7f839f5ccc3361e186f6bbc4c9a48155c78 (diff)
Remove lib/ramtest.c-include from all CAR boards.
Remove many more .c-includes from i945 based boards. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/roda')
-rw-r--r--src/mainboard/roda/rk886ex/romstage.c28
1 files changed, 6 insertions, 22 deletions
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index 98ebadbc22..4942788420 100644
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -28,24 +28,20 @@
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
+#include <lib.h>
#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include <cpu/x86/bist.h>
-#if CONFIG_USBDEBUG
-#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
-#include "pc80/usbdebug_serial.c"
-#endif
-
-#include "lib/ramtest.c"
-#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c"
+#include "northbridge/intel/i945/i945.h"
+#include "northbridge/intel/i945/raminit.h"
+#include "southbridge/intel/i82801gx/i82801gx.h"
-#include "northbridge/intel/i945/udelay.c"
+void enable_smbus(void);
-#include "southbridge/intel/i82801gx/i82801gx.h"
-static void setup_ich7_gpios(void)
+void setup_ich7_gpios(void)
{
printk(BIOS_DEBUG, " GPIOS...");
/* General Registers */
@@ -61,18 +57,6 @@ static void setup_ich7_gpios(void)
outl(0x00010030, DEFAULT_GPIOBASE + 0x38); /* GP_LVL */
}
-#include "northbridge/intel/i945/early_init.c"
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/i945/raminit.h"
-#include "northbridge/intel/i945/raminit.c"
-#include "northbridge/intel/i945/errata.c"
-#include "northbridge/intel/i945/debug.c"
-
static void ich7_enable_lpc(void)
{
// Enable Serial IRQ