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authorAngel Pons <th3fanbus@gmail.com>2020-11-03 00:03:32 +0100
committerAngel Pons <th3fanbus@gmail.com>2020-11-23 09:55:43 +0000
commit2c0aa00d6e562b2e6dbe580e188e24ce5e4336e2 (patch)
tree3e4f0749bda60dd17635765faf47541eb59a4b1c /src/mainboard/roda/rv11
parent447233ce8c25863c2236d0b208bff7f63cd738fb (diff)
mb/**/cmos.layout: Remove crusty comments
Most of these comments have been copy-pasted or serve no purpose other than to eventually turn into misleading info. While the description of the first 120 bits of CMOS could be useful, it should instead be added to the documentation for the CMOS option infrastructure, or /dev/null. Moreover, trim down newlines to no more than two consecutive newlines. Change-Id: I119b248821221e68c4e31edba71ba83b7d2e14e9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47143 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/mainboard/roda/rv11')
-rw-r--r--src/mainboard/roda/rv11/cmos.layout30
1 files changed, 0 insertions, 30 deletions
diff --git a/src/mainboard/roda/rv11/cmos.layout b/src/mainboard/roda/rv11/cmos.layout
index ea36a26644..c32eed267f 100644
--- a/src/mainboard/roda/rv11/cmos.layout
+++ b/src/mainboard/roda/rv11/cmos.layout
@@ -4,27 +4,7 @@
entries
# -----------------------------------------------------------------
-# Status Register A
-# -----------------------------------------------------------------
-# Status Register B
-# -----------------------------------------------------------------
-# Status Register C
-#96 4 r 0 status_c_rsvd
-#100 1 r 0 uf_flag
-#101 1 r 0 af_flag
-#102 1 r 0 pf_flag
-#103 1 r 0 irqf_flag
-# -----------------------------------------------------------------
-# Status Register D
-#104 7 r 0 status_d_rsvd
-#111 1 r 0 valid_cmos_ram
-# -----------------------------------------------------------------
-# Diagnostic Status Register
-#112 8 r 0 diag_rsvd1
-
-# -----------------------------------------------------------------
0 120 r 0 reserved_memory
-#120 264 r 0 unused
# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
@@ -34,40 +14,30 @@ entries
# -----------------------------------------------------------------
# coreboot config options: console
-#392 3 r 0 unused
395 4 e 5 debug_level
-#399 1 r 0 unused
# coreboot config options: cpu
400 1 e 2 hyper_threading
401 3 e 9 gfx_uma_size
-#404 4 r 0 unused
-
# coreboot config options: southbridge
408 1 e 1 nmi
-#409 2 r 0 unused
411 1 e 8 sata_mode
-#412 4 r 0 unused
# coreboot config options: bootloader
416 424 s 0 boot_devices
840 8 h 0 boot_default
848 1 e 7 cmos_defaults_loaded
-#851 5 r 0 unused
# coreboot config options: mainboard specific options
-#856 40 r 0 unused
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
960 16 r 0 mrc_scrambler_seed_chk
-#976 8 r 0 unused
# coreboot config options: check sums
984 16 h 0 check_sum
-#1000 24 r 0 amd_reserved
# -----------------------------------------------------------------