diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2016-11-29 14:13:43 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-01-06 18:14:00 +0100 |
| commit | 62902ca45de871aa59657dd8ec1858c301595634 (patch) | |
| tree | 43b21ab2ec87ec5b41f875efb69be8bb494b0fa7 /src/mainboard/roda/rk886ex/romstage.c | |
| parent | 40843efe5d6dddff19a0d7c8c5fe84c75448e739 (diff) | |
sb/ich7: Use common/gpio.h to set up GPIOs
This is more consistent with newer Intel targets.
This a static struct so it is initialized to 0 by default.
To make it more readable:
* only setting to GPIO mode is made explicit;
* only pins in GPIO mode are either set to input or output since this
is ignored in native mode;
* only output pins are set high or low, since this is read-only on
input;
* blink is only operational on output pins, non-blink is not set
explicitly;
* invert is only operational on input pins, non-invert is not set
explicitly.
Change-Id: I05f9c52dee78b7120b225982c040e3dcc8ee3e4e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17639
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/roda/rk886ex/romstage.c')
| -rw-r--r-- | src/mainboard/roda/rk886ex/romstage.c | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index eef3ff9532..a488488b1a 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -36,36 +36,6 @@ #include <southbridge/intel/i82801gx/i82801gx.h> #include "option_table.h" -void setup_ich7_gpios(void) -{ - printk(BIOS_DEBUG, " GPIOS..."); - /* General Registers */ - outl(0xbfc0f7c0, DEFAULT_GPIOBASE + 0x00); /* GPIO_USE_SEL */ - outl(0x70a87d83, DEFAULT_GPIOBASE + 0x04); /* GP_IO_SEL */ - /* ------------------------------------------------------------ - * 0 - GPO6 - Enable power of SATA channel 0 - * 0 - GPO9 - Wireless LAN power on - * 0 - GPO15 - FAN on - * 1 - GPO22 - FWH WP - * 1 - GPO24 - GPS on - * 0 - GPO25 - External Antenna Mux on - * 0 - GPO26 - BT on - * 0 - GPO27 - GSM on - */ - outl(0x01400000, DEFAULT_GPIOBASE + 0x0c); /* GP_LVL */ - /* ------------------------------------------------------------ */ - /* Output Control Registers */ - outl(0x00000000, DEFAULT_GPIOBASE + 0x18); /* GPO_BLINK */ - /* Input Control Registers */ - outl(0x00002180, DEFAULT_GPIOBASE + 0x2c); /* GPI_INV */ - outl(0x000100e8, DEFAULT_GPIOBASE + 0x30); /* GPIO_USE_SEL2 */ - outl(0x00000030, DEFAULT_GPIOBASE + 0x34); /* GP_IO_SEL2 */ - /* ------------------------------------------------------------ */ - /* 1 - GPO48 - FWH TBL# */ - outl(0x00010000, DEFAULT_GPIOBASE + 0x38); /* GP_LVL */ - /* ------------------------------------------------------------ */ -} - static void ich7_enable_lpc(void) { int lpt_en = 0; |