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authorMarc Jones <marc.jones@se-eng.com>2012-02-21 17:06:40 -0700
committerMarc Jones <marcj303@gmail.com>2012-03-02 23:35:26 +0100
commit067d22340c68d21f0dd5a33cf02701bc54005a0d (patch)
tree36c9dab29b3ef4884dcc9b0d356c70714f1036c5 /src/mainboard/rca
parent07408e687ce440bf665cd6d04d65075b20db0215 (diff)
Fix ECC disable option for AMD Fam10 DDR2 and DDR3.
The logic was backwards on the ECC enable/disable option. Also added better debug output when the debug RAM init feature is enabled. Change-Id: I60bffb6149d96cac65011247ef51cd06ed2210c6 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/670 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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