diff options
| author | Joseph Smith <joe@settoplinux.org> | 2010-04-09 11:10:25 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-09 11:10:25 +0000 |
| commit | 7488e049df9899dd7062b2ffe393b3e9a6f50dc5 (patch) | |
| tree | a226c1f16a9220abb947ba46d26570e065494aa5 /src/mainboard/rca/rm4100/romstage.c | |
| parent | 853263b963b4cacb4f7fa3a7f2c68dcbd094f1d7 (diff) | |
1. This patch adds CAR for Intel P6 series processors.
2. Add support for Micro-FCBGA 479 Celeron and PIII's
3. Add support for model_6bx and microcode updates
4. Add support for CAR and Tinybootblock on RCA RM4100 and Thomson
IP1000
Build and boot tested.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
The change to CAR reveiled a few more warnings in the ICH4 and i830 code,
I fixed them on the fly.
Checking this in because my last two commits broke Joseph's CAR patch. This
version fixes the issues.
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/rca/rm4100/romstage.c')
| -rw-r--r-- | src/mainboard/rca/rm4100/romstage.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/rca/rm4100/romstage.c b/src/mainboard/rca/rm4100/romstage.c index b1bc4b4d1a..c93cec6b37 100644 --- a/src/mainboard/rca/rm4100/romstage.c +++ b/src/mainboard/rca/rm4100/romstage.c @@ -34,7 +34,6 @@ #include "northbridge/intel/i82830/memory_initialized.c" #include "southbridge/intel/i82801dx/i82801dx.h" #include "southbridge/intel/i82801dx/i82801dx_reset.c" -#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" #include "spd_table.h" #include "gpio.c" @@ -98,10 +97,11 @@ static void mb_early_setup(void) pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10); } -static void main(unsigned long bist) +#include "cpu/intel/model_6bx/cache_as_ram_disable.c" + +void real_main(unsigned long bist) { if (bist == 0) { - early_mtrr_init(); if (memory_initialized()) { hard_reset(); } |