diff options
author | li feng <li1.feng@intel.com> | 2018-05-24 14:27:58 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-11 10:48:12 +0000 |
commit | 3130a93bfa953011fed7429b17d3727abd3b4100 (patch) | |
tree | a563b2709eb63992ffee36733a12bb509846541f /src/mainboard/purism | |
parent | 0738d2a00ddadbdd58708ab57189311750cf84f5 (diff) |
skylake: Remove "IshEnable"
Remove "IshEnable" from soc_intel_skylake_config since it's not
used anymore.
Enable/disable ISH by checking if ISH device is turned on or not.
Refer to https://review.coreboot.org/#/c/coreboot/+/26485/.
BUG=b:79244403
BRANCH=none
TEST=Built.
Change-Id: I4d2889af118659852431c87cb516fd19b577efc5
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://review.coreboot.org/26521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/purism')
-rw-r--r-- | src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 1 | ||||
-rw-r--r-- | src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb index 08ba50607b..a4fd502dbe 100644 --- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb @@ -56,7 +56,6 @@ chip soc/intel/skylake register "ScsEmmcEnabled" = "0" register "ScsEmmcHs400Enabled" = "0" register "ScsSdCardEnabled" = "0" - register "IshEnable" = "0" register "PttSwitch" = "0" register "InternalGfx" = "1" register "SkipExtGfxScan" = "1" diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb index 4ba6ccddba..7ff3dad399 100644 --- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb @@ -56,7 +56,6 @@ chip soc/intel/skylake register "ScsEmmcEnabled" = "0" register "ScsEmmcHs400Enabled" = "0" register "ScsSdCardEnabled" = "0" - register "IshEnable" = "0" register "PttSwitch" = "0" register "InternalGfx" = "1" register "SkipExtGfxScan" = "1" |