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authorMatt DeVillier <matt.devillier@puri.sm>2020-11-03 13:05:04 -0600
committerMichael Niewöhner <foss@mniewoehner.de>2020-11-04 20:10:37 +0000
commita41991a3f91987c04c2c80f271d9e63d32ca4338 (patch)
treede4488fab81c31dec960cf91f5c61bf42a440f10 /src/mainboard/purism
parent0b327a4c3a74da879476ef919d7b45bf628ffd8e (diff)
mb/purism/librem_mini: Increase TDP/PL2 setting
PL2 was set artificially low during development when the active cooling fan was not functional, and never corrected once the fan was fixed. Raise PL2 to a value which works with both Librem Mini variants. Change-Id: Ie377392020f73359aed80ddae727adb6f8d06344 Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47186 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/purism')
-rw-r--r--src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
index 308fa69489..9d2b34b16c 100644
--- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
+++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
@@ -8,7 +8,7 @@ chip soc/intel/cannonlake
# Power limit
register "power_limits_config" = "{
.tdp_pl1_override = 25,
- .tdp_pl2_override = 28,
+ .tdp_pl2_override = 51,
}"
# Enable Enhanced Intel SpeedStep