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authorAngel Pons <th3fanbus@gmail.com>2020-10-23 20:38:23 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-10-30 00:45:36 +0000
commit3cc2c38d50741fffb9193851a4a3b7c636f7cd4d (patch)
treed836bf1ee32e6132d9db9aa1f19c5779e3398ccc /src/mainboard/purism
parent9f6cdbaaf5d1a799e314e0baf9f4fda218abdf75 (diff)
soc/intel/broadwell: Separate PCH in devicetree
Flesh out the PCH configuration into a separate chip. Keep it within the Broadwell SoC directory for now, to ease moving files around. The boards were prepared beforehand and the devicetrees require next to no changes. Tested on out-of-tree Acer Aspire E5-573, still boots. Change-Id: I28d948f3e6d85e669d12b29516d867c1d1ae9e1a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46700 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/purism')
-rw-r--r--src/mainboard/purism/librem_bdw/devicetree.cb4
-rw-r--r--src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb4
-rw-r--r--src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb4
3 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/purism/librem_bdw/devicetree.cb b/src/mainboard/purism/librem_bdw/devicetree.cb
index 4f34f7d6d4..0d0fc720f7 100644
--- a/src/mainboard/purism/librem_bdw/devicetree.cb
+++ b/src/mainboard/purism/librem_bdw/devicetree.cb
@@ -24,7 +24,7 @@ chip soc/intel/broadwell
device pci 02.0 on end # vga controller
device pci 03.0 on end # mini-hd audio
-# chip soc/intel/broadwell/pch
+ chip soc/intel/broadwell/pch
# EC host command ranges are in 0x380-0x383 & 0x80-0x8f
register "gen1_dec" = "0x00000381"
register "gen2_dec" = "0x000c0081"
@@ -57,6 +57,6 @@ chip soc/intel/broadwell
device pci 1f.2 on end # SATA Controller
device pci 1f.3 on end # SMBus
device pci 1f.6 off end # Thermal
-# end
+ end
end
end
diff --git a/src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb b/src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb
index 237e6979ec..256077cbd9 100644
--- a/src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb
+++ b/src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb
@@ -1,7 +1,7 @@
chip soc/intel/broadwell
device domain 0 on
-# chip soc/intel/broadwell/pch
+ chip soc/intel/broadwell/pch
# Port 0 is HDD
# Port 3 is M.2 NGFF
register "sata_port_map" = "0x9"
@@ -11,6 +11,6 @@ chip soc/intel/broadwell
register "sata_port3_gen3_dtle" = "9"
device pci 1c.2 on end # PCIe Port #3 - LAN
-# end
+ end
end
end
diff --git a/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb b/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb
index b9b29cd6ff..d88c19c26a 100644
--- a/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb
+++ b/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb
@@ -1,7 +1,7 @@
chip soc/intel/broadwell
device domain 0 on
-# chip soc/intel/broadwell/pch
+ chip soc/intel/broadwell/pch
# Port 0 is HDD
# Port 1 is M.2 NGFF
register "sata_port_map" = "0x3"
@@ -11,6 +11,6 @@ chip soc/intel/broadwell
register "sata_port1_gen3_dtle" = "9"
device pci 1d.0 on end # USB2 EHCI
-# end
+ end
end
end