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authorMichael Niewöhner <foss@mniewoehner.de>2020-09-05 13:47:11 +0200
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-09-06 14:38:28 +0000
commit2539a672731e0f8059ce76a11a350a3a0c5ccddf (patch)
treedb2463ae12d30e05893b2a443a6acce0d5228e44 /src/mainboard/purism
parent056d5523578dea5968d14ad1277ea263a5be7796 (diff)
mb/*: devicetree: drop now unneeded USBx_PORT_EMPTY
Setting USBx_PORT_EMPTY is not a requirement anymore, since unset devicetree settings default to 0 and the OC pin now only gets set when the USB port is enabled (see CB:45112). Thus, drop the setting from all devicetrees. Change-Id: I899349c49fa7de1c1acdca24994ebe65c01d80c6 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/mainboard/purism')
-rw-r--r--src/mainboard/purism/librem_whl/devicetree.cb13
1 files changed, 0 insertions, 13 deletions
diff --git a/src/mainboard/purism/librem_whl/devicetree.cb b/src/mainboard/purism/librem_whl/devicetree.cb
index b85e10f402..497a4cca4d 100644
--- a/src/mainboard/purism/librem_whl/devicetree.cb
+++ b/src/mainboard/purism/librem_whl/devicetree.cb
@@ -82,27 +82,14 @@ chip soc/intel/cannonlake
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Type-A front right upper
register "usb2_ports[5]" = "USB2_PORT_TYPE_C(OC3)" # Type-C rear
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # m.2-2230/Bluetooth
- register "usb2_ports[7]" = "USB2_PORT_EMPTY" # NC
- register "usb2_ports[8]" = "USB2_PORT_EMPTY" # NC
register "usb2_ports[9]" = "USB2_PORT_MID(OC2)" # Type-A rear lower
- register "usb2_ports[10]" = "USB2_PORT_EMPTY" # NC
- register "usb2_ports[11]" = "USB2_PORT_EMPTY" # NC
- register "usb2_ports[12]" = "USB2_PORT_EMPTY" # NC
- register "usb2_ports[13]" = "USB2_PORT_EMPTY" # NC
- register "usb2_ports[14]" = "USB2_PORT_EMPTY" # NC
- register "usb2_ports[15]" = "USB2_PORT_EMPTY" # NC
# USB3
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A front left upper
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A front left lower
- register "usb3_ports[2]" = "USB3_PORT_EMPTY" # NC
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-C rear
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # Type-A rear lower
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC2)" # Type-A rear upper
- register "usb3_ports[6]" = "USB3_PORT_EMPTY" # NC
- register "usb3_ports[7]" = "USB3_PORT_EMPTY" # NC
- register "usb3_ports[8]" = "USB3_PORT_EMPTY" # NC
- register "usb3_ports[9]" = "USB3_PORT_EMPTY" # NC
# All SRCCLKREQ pins mapped directly
register "PcieClkSrcClkReq[0]" = "0"