mb/purism/librem_cnl: move setting of FSP-M UPDs into variant.c

The upcoming Librem 14 variant won't use the same SATA HSIO adjustments
as the Librem Mini, so move these settings into a variant-specific file.

Rename existing gpio.h to variant.h, move to board root directory, and
use for all variant-specific declarations; adjust references as needed.

Add newly-created variant.c to Makefile.

Test: build/boot Librem Mini, verify SATA functionality unchanged.

Change-Id: Ie8f714cc759675c692ad6e3f20e50adad8d09d4b
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48519
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 2 insertions, 6 deletions

diff --git a/src/mainboard/purism/librem_cnl/romstage.c b/src/mainboard/purism/librem_cnl/romstage.c
index 3a3ca6b491..b7c57ee379 100644
--- a/src/mainboard/purism/librem_cnl/romstage.c
+++ b/src/mainboard/purism/librem_cnl/romstage.c
@@ -2,6 +2,7 @@
 
 #include <soc/cnl_memcfg_init.h>
 #include <soc/romstage.h>
+#include "variant.h"
 
 static const struct cnl_mb_cfg memcfg = {
 
@@ -50,10 +51,5 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
 {
 	FSP_M_CONFIG *mem_cfg = &memupd->FspmConfig;
 	cannonlake_memcfg_init(mem_cfg, &memcfg);
-
-	/* Enable and set SATA HSIO adjustments for ports 0 and 2 */
-	mem_cfg->PchSataHsioRxGen3EqBoostMagEnable[0] = 1;
-	mem_cfg->PchSataHsioRxGen3EqBoostMagEnable[2] = 1;
-	mem_cfg->PchSataHsioRxGen3EqBoostMag[0] = 2;
-	mem_cfg->PchSataHsioRxGen3EqBoostMag[2] = 1;
+	variant_memory_init_params(mem_cfg);
 }