mb/purism/librem_whl: rename to librem_cnl

Since Whiskeylake SoC code is actually a subset of soc/intel/cannonlake,
rename the baseboard so that boards using other 'cannonlake family' SoCs
(e.g., Cometlake) can be added with minimal confusion.

Rename the mainboard dir and baseboard name, and adjust any references
to them.

Change-Id: I2af7977f1622070eb8bf8449bc8306f9d75b9851
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47050
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

1 files changed, 13 insertions, 0 deletions

diff --git a/src/mainboard/purism/librem_cnl/ramstage.c b/src/mainboard/purism/librem_cnl/ramstage.c
new file mode 100644
index 0000000000..56ed1b7844
--- /dev/null
+++ b/src/mainboard/purism/librem_cnl/ramstage.c
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/ramstage.h>
+#include <variant/gpio.h>
+
+void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+{
+	/* Configure pads prior to SiliconInit() in case there's any
+	 * dependencies during hardware initialization. */
+	size_t num_gpios;
+	const struct pad_config *gpio_table = variant_gpio_table(&num_gpios);
+	cnl_configure_pads(gpio_table, num_gpios);
+}