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authorDuncan Laurie <dlaurie@google.com>2015-12-22 17:27:02 -0800
committerMartin Roth <martinroth@google.com>2016-01-22 19:13:14 +0100
commit27807c66ee5d73c54de942b56359e447d27b1477 (patch)
treea269a1de89d3eca2745c36525c8657f58d2dcb0c /src/mainboard/purism/librem13/gpio.h
parent420b2a513e48e7e9416a93dd7681c57328942708 (diff)
purism/librem13: Add support for Purism Librem 13 mainboard
This adds support for booting the Purism Librem 13 mainboard with coreboot, using binaries extracted from the original BIOS and from a Broadwell Chromebook. The following features have been tested on Ubuntu 15.10: - Input: Keyboard and Trackpad - SATA: Internal HDD and M.2 NGFF - Network: WiFi and Ethernet - USB: Bluetooth, Camera, SD Card, Ports (1xUSB2 and 1xUSB3) - Video: Internal panel and HDMI port - Internal speakers and microphone (headphones do not work) - EC handling for battery, AC, lid, special keys These binaries are extracted from the original BIOS: - VGA BIOS - Management Engine - Intel Firmware Descriptor These binaries are extracted from a Broadwell Chromebook BIOS: - MemoryInit reference code binary - SiliconInit reference code binary This was developed and tested on an Librem 13 device. For those who may want to do more development you can use EHCI debug and the right USB port to get coreboot output. Change-Id: Ia72e2d7ddc8ba5eef63819e5677122a5a5c705d8 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/13026 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/purism/librem13/gpio.h')
-rw-r--r--src/mainboard/purism/librem13/gpio.h120
1 files changed, 120 insertions, 0 deletions
diff --git a/src/mainboard/purism/librem13/gpio.h b/src/mainboard/purism/librem13/gpio.h
new file mode 100644
index 0000000000..98b09bc45a
--- /dev/null
+++ b/src/mainboard/purism/librem13/gpio.h
@@ -0,0 +1,120 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MAINBOARD_GPIO_H
+#define MAINBOARD_GPIO_H
+
+#include <soc/gpio.h>
+
+static const struct gpio_config mainboard_gpio_config[] = {
+ PCH_GPIO_INPUT, /* 0 */
+ PCH_GPIO_INPUT, /* 1 */
+ PCH_GPIO_INPUT, /* 2 */
+ PCH_GPIO_INPUT, /* 3 */
+ PCH_GPIO_INPUT, /* 4 */
+ PCH_GPIO_INPUT, /* 5 */
+ PCH_GPIO_INPUT, /* 6 */
+ PCH_GPIO_INPUT, /* 7 */
+ PCH_GPIO_INPUT, /* 8 */
+ PCH_GPIO_INPUT, /* 9 */
+ PCH_GPIO_ACPI_SCI, /* 10 */
+ PCH_GPIO_INPUT, /* 11 */
+ PCH_GPIO_INPUT, /* 12 */
+ PCH_GPIO_INPUT, /* 13 */
+ PCH_GPIO_INPUT, /* 14 */
+ PCH_GPIO_INPUT, /* 15 */
+ PCH_GPIO_INPUT, /* 16 */
+ PCH_GPIO_INPUT, /* 17 */
+ PCH_GPIO_NATIVE, /* 18 */
+ PCH_GPIO_NATIVE, /* 19 */
+ PCH_GPIO_INPUT, /* 20 */
+ PCH_GPIO_INPUT, /* 21 */
+ PCH_GPIO_INPUT, /* 22 */
+ PCH_GPIO_INPUT, /* 23 */
+ PCH_GPIO_INPUT, /* 24 */
+ PCH_GPIO_INPUT, /* 25 */
+ PCH_GPIO_INPUT, /* 26 */
+ PCH_GPIO_INPUT, /* 27 */
+ PCH_GPIO_INPUT, /* 28 */
+ PCH_GPIO_NATIVE, /* 29 */
+ PCH_GPIO_NATIVE, /* 30 */
+ PCH_GPIO_NATIVE, /* 31 */
+ PCH_GPIO_INPUT, /* 32 */
+ PCH_GPIO_INPUT, /* 33 */
+ PCH_GPIO_INPUT, /* 34 */
+ PCH_GPIO_NATIVE, /* 35 */
+ PCH_GPIO_NATIVE, /* 36 */
+ PCH_GPIO_NATIVE, /* 37 */
+ PCH_GPIO_INPUT, /* 38 */
+ PCH_GPIO_NATIVE, /* 39 */
+ PCH_GPIO_NATIVE, /* 40 */
+ PCH_GPIO_INPUT, /* 41 */
+ PCH_GPIO_INPUT, /* 42 */
+ PCH_GPIO_INPUT, /* 43 */
+ PCH_GPIO_INPUT, /* 44 */
+ PCH_GPIO_INPUT, /* 45 */
+ PCH_GPIO_INPUT, /* 46 */
+ PCH_GPIO_INPUT, /* 47 */
+ PCH_GPIO_INPUT, /* 48 */
+ PCH_GPIO_INPUT, /* 49 */
+ PCH_GPIO_INPUT, /* 50 */
+ PCH_GPIO_INPUT, /* 51 */
+ PCH_GPIO_INPUT, /* 52 */
+ PCH_GPIO_INPUT, /* 53 */
+ PCH_GPIO_INPUT, /* 54 */
+ PCH_GPIO_INPUT, /* 55 */
+ PCH_GPIO_INPUT, /* 56 */
+ PCH_GPIO_INPUT, /* 57 */
+ PCH_GPIO_INPUT, /* 58 */
+ PCH_GPIO_INPUT, /* 59 */
+ PCH_GPIO_INPUT, /* 60 */
+ PCH_GPIO_NATIVE, /* 61 */
+ PCH_GPIO_NATIVE, /* 62 */
+ PCH_GPIO_NATIVE, /* 63 */
+ PCH_GPIO_INPUT, /* 64 */
+ PCH_GPIO_INPUT, /* 65 */
+ PCH_GPIO_INPUT, /* 66 */
+ PCH_GPIO_INPUT, /* 67 */
+ PCH_GPIO_INPUT, /* 68 */
+ PCH_GPIO_INPUT, /* 69 */
+ PCH_GPIO_INPUT, /* 70 */
+ PCH_GPIO_NATIVE, /* 71 */
+ PCH_GPIO_NATIVE, /* 72 */
+ PCH_GPIO_INPUT, /* 73 */
+ PCH_GPIO_NATIVE, /* 74 */
+ PCH_GPIO_NATIVE, /* 75 */
+ PCH_GPIO_NATIVE, /* 76 */
+ PCH_GPIO_INPUT, /* 77 */
+ PCH_GPIO_INPUT, /* 78 */
+ PCH_GPIO_INPUT, /* 79 */
+ PCH_GPIO_INPUT, /* 80 */
+ PCH_GPIO_NATIVE, /* 81 */
+ PCH_GPIO_NATIVE, /* 82 */
+ PCH_GPIO_INPUT, /* 83 */
+ PCH_GPIO_INPUT, /* 84 */
+ PCH_GPIO_INPUT, /* 85 */
+ PCH_GPIO_INPUT, /* 86 */
+ PCH_GPIO_INPUT, /* 87 */
+ PCH_GPIO_INPUT, /* 88 */
+ PCH_GPIO_INPUT, /* 89 */
+ PCH_GPIO_INPUT, /* 90 */
+ PCH_GPIO_INPUT, /* 91 */
+ PCH_GPIO_INPUT, /* 92 */
+ PCH_GPIO_INPUT, /* 93 */
+ PCH_GPIO_INPUT, /* 94 */
+ PCH_GPIO_END
+};
+
+#endif