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| author | Nico Huber <nico.h@gmx.de> | 2019-08-11 19:53:56 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-01-26 13:40:58 +0000 |
| commit | 87b5fa7c9d291521223678c1f9d9ee5c0c3444e5 (patch) | |
| tree | 45aec770bd7775e3bb794e76bc537404949420f9 /src/mainboard/prodrive/atlas/gpio.c | |
| parent | d13118320030c6df48ad33243d48c3ff34cb67d7 (diff) | |
nb/intel/gm45: Add remaining raminit code to support DDR2
Add the remaining DDR2 code to program the registers for memory
timings, ODT, RCOMP, and refresh mode; and perform receive-enable
calibration.
TEST: DDR2 systems boot
- Tested on a Dell Latitude E6400
- Tested on a Compal JHL90
TEST: Ensure DDR3 systems still boot
- Tested on a Thinkpad X200
Change-Id: I6d9a1853fea9e29171d7c2f9ffe7086685c9efad
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34834
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/prodrive/atlas/gpio.c')
0 files changed, 0 insertions, 0 deletions