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authorFelix Singer <felix.singer@secunet.com>2020-09-07 15:21:21 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-11-16 12:14:01 +0000
commit205b53ee77baa257f20265dfbc6d6d72a2e504a5 (patch)
tree2df84a72949b92fa010a2b5b79c53c08b725061e /src/mainboard/portwell
parent81f5bf301710911a5381084aba9ff99b8e575a46 (diff)
device: Allow configuring bus mastering for PCI bridges conditionally
Change-Id: Ic7cacce28f473dda76ca203016dbb8e00149a990 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45150 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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