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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-14 14:52:06 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-11-05 09:00:26 +0000
commit19f5ba81be265da3d1a2a15c106486677479dfd5 (patch)
treeef03b65c6223c85d81934953cf6780876f663123 /src/mainboard/pcengines
parent54f942499b72efe301e7bee7b7d9daf6a1d8c8ea (diff)
amd: Fix non-local header treated as local
Change-Id: I0668b73cd3a5bf5220af55c29785220b77eb5259 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29103 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/pcengines')
-rw-r--r--src/mainboard/pcengines/apu1/BiosCallOuts.c4
-rw-r--r--src/mainboard/pcengines/apu1/buildOpts.c2
-rw-r--r--src/mainboard/pcengines/apu1/romstage.c2
-rw-r--r--src/mainboard/pcengines/apu2/BiosCallOuts.c6
-rw-r--r--src/mainboard/pcengines/apu2/gpio_ftns.c2
5 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/pcengines/apu1/BiosCallOuts.c b/src/mainboard/pcengines/apu1/BiosCallOuts.c
index 650de0f638..906ecb648f 100644
--- a/src/mainboard/pcengines/apu1/BiosCallOuts.c
+++ b/src/mainboard/pcengines/apu1/BiosCallOuts.c
@@ -13,10 +13,10 @@
* GNU General Public License for more details.
*/
-#include "AGESA.h"
+#include <AGESA.h>
#include <spd_bin.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "SB800.h"
+#include <SB800.h>
#include <stdlib.h>
#include "gpio_ftns.h"
diff --git a/src/mainboard/pcengines/apu1/buildOpts.c b/src/mainboard/pcengines/apu1/buildOpts.c
index a66c9d1779..1f73eee802 100644
--- a/src/mainboard/pcengines/apu1/buildOpts.c
+++ b/src/mainboard/pcengines/apu1/buildOpts.c
@@ -201,7 +201,7 @@
* Uncomment and specify the value for the configuration options
* needed by the system.
*/
-#include "AGESA.h"
+#include <AGESA.h>
/* The fixed MTRR values to be set after memory initialization. */
CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
diff --git a/src/mainboard/pcengines/apu1/romstage.c b/src/mainboard/pcengines/apu1/romstage.c
index 50b51cc5c0..ab48943c55 100644
--- a/src/mainboard/pcengines/apu1/romstage.c
+++ b/src/mainboard/pcengines/apu1/romstage.c
@@ -20,7 +20,7 @@
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct5104d/nct5104d.h>
#include "gpio_ftns.h"
-#include "SB800.h"
+#include <SB800.h>
#define SIO_PORT 0x2e
#define SERIAL_DEV PNP_DEV(SIO_PORT, NCT5104D_SP1)
diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c
index 1c7b4fd7a9..8a960cf6c7 100644
--- a/src/mainboard/pcengines/apu2/BiosCallOuts.c
+++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c
@@ -13,11 +13,11 @@
* GNU General Public License for more details.
*/
-#include "AGESA.h"
+#include <AGESA.h>
#include <spd_bin.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
-#include "FchPlatform.h"
-#include "cbfs.h"
+#include <FchPlatform.h>
+#include <cbfs.h>
#include "gpio_ftns.h"
#include "imc.h"
#include "hudson.h"
diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.c b/src/mainboard/pcengines/apu2/gpio_ftns.c
index f3939cd2a1..69a0e3c75d 100644
--- a/src/mainboard/pcengines/apu2/gpio_ftns.c
+++ b/src/mainboard/pcengines/apu2/gpio_ftns.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
#include <southbridge/amd/cimx/cimx_util.h>
-#include "FchPlatform.h"
+#include <FchPlatform.h>
#include "gpio_ftns.h"
void configure_gpio(u32 iomux_gpio, u8 iomux_ftn, u32 gpio, u32 setting)