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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-17 10:56:26 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-23 15:52:09 +0000
commita342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch)
tree4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/mainboard/pcengines
parent9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff)
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/pcengines')
-rw-r--r--src/mainboard/pcengines/alix1c/romstage.c2
-rw-r--r--src/mainboard/pcengines/alix2d/romstage.c2
-rw-r--r--src/mainboard/pcengines/apu1/OemCustomize.c2
-rw-r--r--src/mainboard/pcengines/apu1/gpio_ftns.c6
-rw-r--r--src/mainboard/pcengines/apu2/BiosCallOuts.c2
-rw-r--r--src/mainboard/pcengines/apu2/mainboard.c4
6 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index 8fe2dc09d5..e482840431 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -44,7 +44,7 @@
* 4banks (2)
* SSTL_2 (2)
* 4th GEN die (C)
- * Normal Power Consumption (<blank> )
+ * Normal Power Consumption (<blank>)
* TSOP (T)
* Single Die (<blank>)
* Lead Free (P)
diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c
index da3913d2a4..9bb9c00d2d 100644
--- a/src/mainboard/pcengines/alix2d/romstage.c
+++ b/src/mainboard/pcengines/alix2d/romstage.c
@@ -42,7 +42,7 @@
* 4banks (2)
* SSTL_2 (2)
* 4th GEN die (C)
- * Normal Power Consumption (<blank> )
+ * Normal Power Consumption (<blank>)
* TSOP (T)
* Single Die (<blank>)
* Lead Free (P)
diff --git a/src/mainboard/pcengines/apu1/OemCustomize.c b/src/mainboard/pcengines/apu1/OemCustomize.c
index 330531f7e4..9febec73d0 100644
--- a/src/mainboard/pcengines/apu1/OemCustomize.c
+++ b/src/mainboard/pcengines/apu1/OemCustomize.c
@@ -108,7 +108,7 @@ static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
#define WLSEED 0x08
#define RXSEED 0x40
WRITE_LEVELING_SEED(ANY_SOCKET, ANY_CHANNEL, WLSEED, WLSEED, WLSEED, WLSEED, WLSEED, WLSEED, WLSEED, WLSEED, WLSEED),
- HW_RXEN_SEED( ANY_SOCKET, ANY_CHANNEL, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED),
+ HW_RXEN_SEED(ANY_SOCKET, ANY_CHANNEL, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED, RXSEED),
PSO_END
};
diff --git a/src/mainboard/pcengines/apu1/gpio_ftns.c b/src/mainboard/pcengines/apu1/gpio_ftns.c
index 74c3b7b5ac..7a988e7ec6 100644
--- a/src/mainboard/pcengines/apu1/gpio_ftns.c
+++ b/src/mainboard/pcengines/apu1/gpio_ftns.c
@@ -25,9 +25,9 @@ uintptr_t find_gpio_base(void)
uintptr_t base_addr = 0;
/* Find the ACPImmioAddr base address */
- for ( pm_index = 0x27; pm_index > 0x23; pm_index-- ) {
- outb( pm_index, PM_INDEX );
- pm_data = inb( PM_DATA );
+ for (pm_index = 0x27; pm_index > 0x23; pm_index--) {
+ outb(pm_index, PM_INDEX);
+ pm_data = inb(PM_DATA);
base_addr <<= 8;
base_addr |= (u32)pm_data;
}
diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c
index 8e2636bdfc..1c7b4fd7a9 100644
--- a/src/mainboard/pcengines/apu2/BiosCallOuts.c
+++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c
@@ -99,7 +99,7 @@ static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
FchParams->Usb.Ehci1Enable = TRUE;
}
- // Enable EHCI 1 ( port 4 to 7)
+ // Enable EHCI 1 (port 4 to 7)
// port 4 and 5 to EHCI header port 6 and 7 to PCIe slot.
FchParams->Usb.Ehci2Enable = TRUE;
diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c
index 9434b938f4..99ddf80373 100644
--- a/src/mainboard/pcengines/apu2/mainboard.c
+++ b/src/mainboard/pcengines/apu2/mainboard.c
@@ -167,12 +167,12 @@ static void mainboard_enable(struct device *dev)
//
// Enable the RTC output
//
- pm_write16 ( PM_RTC_CONTROL, pm_read16( PM_RTC_CONTROL ) | (1 << 11));
+ pm_write16(PM_RTC_CONTROL, pm_read16(PM_RTC_CONTROL) | (1 << 11));
//
// Enable power on from WAKE#
//
- pm_write16 ( PM_S_STATE_CONTROL, pm_read16( PM_S_STATE_CONTROL ) | (1 << 14));
+ pm_write16(PM_S_STATE_CONTROL, pm_read16(PM_S_STATE_CONTROL) | (1 << 14));
/* Initialize the PIRQ data structures for consumption */
pirq_setup();