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authorDuncan Laurie <dlaurie@chromium.org>2014-09-29 09:30:36 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-02 17:28:13 +0200
commit842978631580333becf635cc78f1901615d34929 (patch)
tree3b237de9096971b230b762d29845ec58c9161e7e /src/mainboard/pcengines
parentb12e9becfe47f8f02046274181ce8bae122ab58a (diff)
samus: Fix codec interrupt and add GPIO defines
The codec interrupt needs to come from codec GPIO1, so use the HOTWORD_DET GPIO as the codec IRQ and the DSP_INT as the wake.The This means codec interrupt is GPIO46 which is PIRQO and should be interrupt 30. Also add GPIO defines for the GPIOs attached to the codec itself. These are defined by index, and I used the same "jack detect" and "mic present" indices that were used in baytrail. The codec interrupt to the host is added at index 2 and the hostword detect interrupt to the host is added at index 3. These can be changed as we work through the implementation in the kernel driver. BUG=chrome-os-partner:29649 BRANCH=samus TEST=build and boot on samus Change-Id: Id9cb083ddf9df161be314da4148740ed9f4d0fe6 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 3958efb28813c664a8a4219f78bdd0fcfe75c706 Original-Change-Id: I1c1ac1b6095fab7e3f4412555db4f9a9138e528b Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/220326 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9216 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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