diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-04 08:01:09 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-05 12:44:43 +0000 |
| commit | 13a500a404083c250e28816a394ee8d2849f4028 (patch) | |
| tree | 48ddf3d66501baa91c6aad76a1f1857185e260f1 /src/mainboard/pcengines | |
| parent | 64aa881263fa3fdec827a3f7adf04b138ab82ff1 (diff) | |
amd/geode_lx: Fix .c includes
Change-Id: I2cce52561d30e30e1c81752cd2a455e7211006eb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Diffstat (limited to 'src/mainboard/pcengines')
| -rw-r--r-- | src/mainboard/pcengines/alix1c/romstage.c | 17 | ||||
| -rw-r--r-- | src/mainboard/pcengines/alix2d/romstage.c | 10 |
2 files changed, 9 insertions, 18 deletions
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 4c06ada723..8fe2dc09d5 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -25,14 +25,14 @@ #include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> -#include <southbridge/amd/cs5536/cs5536.h> #include <northbridge/amd/lx/raminit.h> - -#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) - +#include <northbridge/amd/lx/northbridge.h> +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> +#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) + /* The part is a Hynix hy5du121622ctp-d43. * * HY 5D U 12 16 2 2 C <blank> T <blank> P D43 @@ -88,11 +88,6 @@ int spd_read_byte(unsigned int device, unsigned int address) return spdbytes[address]; } -#include "northbridge/amd/lx/pll_reset.c" -#include "cpu/amd/geode_lx/cpureginit.c" -#include "cpu/amd/geode_lx/syspreinit.c" -#include "cpu/amd/geode_lx/msrinit.c" - void asmlinkage mainboard_romstage_entry(unsigned long bist) { static const struct mem_controller memctrl[] = { @@ -100,7 +95,7 @@ void asmlinkage mainboard_romstage_entry(unsigned long bist) }; SystemPreInit(); - msr_init(); + lx_msr_init(); cs5536_early_setup(); @@ -114,7 +109,7 @@ void asmlinkage mainboard_romstage_entry(unsigned long bist) /* Halt if there was a built in self test failure */ report_bist_failure(bist); - pll_reset(); + lx_pll_reset(); cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED); diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index e653c9f03e..da3913d2a4 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -27,6 +27,7 @@ #include <cpu/amd/car.h> #include <southbridge/amd/cs5536/cs5536.h> #include <northbridge/amd/lx/raminit.h> +#include <northbridge/amd/lx/northbridge.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -85,11 +86,6 @@ int spd_read_byte(unsigned int device, unsigned int address) return spdbytes[address]; } -#include "northbridge/amd/lx/pll_reset.c" -#include "cpu/amd/geode_lx/cpureginit.c" -#include "cpu/amd/geode_lx/syspreinit.c" -#include "cpu/amd/geode_lx/msrinit.c" - /** Early mainboard specific GPIO setup. */ static void mb_gpio_init(void) { @@ -122,7 +118,7 @@ void asmlinkage mainboard_romstage_entry(unsigned long bist) }; SystemPreInit(); - msr_init(); + lx_msr_init(); cs5536_early_setup(); @@ -136,7 +132,7 @@ void asmlinkage mainboard_romstage_entry(unsigned long bist) /* Halt if there was a built in self test failure */ report_bist_failure(bist); - pll_reset(); + lx_pll_reset(); cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED); |