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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-02-09 16:07:41 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-02-13 21:56:38 +0100
commit7916f4cef62bf032af86368a9df45db833d09b79 (patch)
treeab2a85208db187624f8615c135acf605777fc7d8 /src/mainboard/pcengines
parent50759ed4ff438db6f3b093984fbb79d6445ebcb3 (diff)
AMD Geode cpus: apply un-written naming rules
Kconfig directives to select chip drivers for compile literally match the chip directory names capitalized and underscored. Rename directories and Kconfig as follows: model_lx -> geode_lx model_gx1 -> geode_gx1 model_gx2 -> geode_gx2 Change-Id: Ib8bf1e758b88f9efed1cf8b11c76b796388e7147 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/613 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/pcengines')
-rw-r--r--src/mainboard/pcengines/alix1c/Kconfig2
-rw-r--r--src/mainboard/pcengines/alix1c/devicetree.cb2
-rw-r--r--src/mainboard/pcengines/alix1c/romstage.c6
-rw-r--r--src/mainboard/pcengines/alix2d/Kconfig2
-rw-r--r--src/mainboard/pcengines/alix2d/devicetree.cb2
-rw-r--r--src/mainboard/pcengines/alix2d/romstage.c6
6 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/pcengines/alix1c/Kconfig b/src/mainboard/pcengines/alix1c/Kconfig
index 0a016a54f5..315b7edbf6 100644
--- a/src/mainboard/pcengines/alix1c/Kconfig
+++ b/src/mainboard/pcengines/alix1c/Kconfig
@@ -3,7 +3,7 @@ if BOARD_PCENGINES_ALIX1C
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
- select CPU_AMD_LX
+ select CPU_AMD_GEODE_LX
select NORTHBRIDGE_AMD_LX
select SOUTHBRIDGE_AMD_CS5536
select SUPERIO_WINBOND_W83627HF
diff --git a/src/mainboard/pcengines/alix1c/devicetree.cb b/src/mainboard/pcengines/alix1c/devicetree.cb
index 4af91ca2a4..91d935038b 100644
--- a/src/mainboard/pcengines/alix1c/devicetree.cb
+++ b/src/mainboard/pcengines/alix1c/devicetree.cb
@@ -77,7 +77,7 @@ chip northbridge/amd/lx
# APIC cluster is late CPU init.
device lapic_cluster 0 on
- chip cpu/amd/model_lx
+ chip cpu/amd/geode_lx
device lapic 0 on end
end
end
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index 7e025a88b3..f109031a8c 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -107,9 +107,9 @@ static u8 spd_read_byte(u8 device, u8 address)
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "lib/generic_sdram.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-#include "cpu/amd/model_lx/msrinit.c"
+#include "cpu/amd/geode_lx/cpureginit.c"
+#include "cpu/amd/geode_lx/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
void main(unsigned long bist)
{
diff --git a/src/mainboard/pcengines/alix2d/Kconfig b/src/mainboard/pcengines/alix2d/Kconfig
index 264f5d9e97..c2e4b2e9dd 100644
--- a/src/mainboard/pcengines/alix2d/Kconfig
+++ b/src/mainboard/pcengines/alix2d/Kconfig
@@ -3,7 +3,7 @@ if BOARD_PCENGINES_ALIX2D
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
- select CPU_AMD_LX
+ select CPU_AMD_GEODE_LX
select NORTHBRIDGE_AMD_LX
select SOUTHBRIDGE_AMD_CS5536
select HAVE_PIRQ_TABLE
diff --git a/src/mainboard/pcengines/alix2d/devicetree.cb b/src/mainboard/pcengines/alix2d/devicetree.cb
index edcbc06623..836ba3547c 100644
--- a/src/mainboard/pcengines/alix2d/devicetree.cb
+++ b/src/mainboard/pcengines/alix2d/devicetree.cb
@@ -37,7 +37,7 @@ chip northbridge/amd/lx
# APIC cluster is late CPU init.
device lapic_cluster 0 on
- chip cpu/amd/model_lx
+ chip cpu/amd/geode_lx
device lapic 0 on end
end
end
diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c
index 6ced8f279e..0e8cc63a16 100644
--- a/src/mainboard/pcengines/alix2d/romstage.c
+++ b/src/mainboard/pcengines/alix2d/romstage.c
@@ -106,9 +106,9 @@ static u8 spd_read_byte(u8 device, u8 address)
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "lib/generic_sdram.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-#include "cpu/amd/model_lx/msrinit.c"
+#include "cpu/amd/geode_lx/cpureginit.c"
+#include "cpu/amd/geode_lx/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
/** Early mainboard specific GPIO setup. */
static void mb_gpio_init(void)