diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-01-09 16:08:12 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-11 18:12:49 +0000 |
| commit | e34a1f98151be7a58aaa4f6ec83f9cdd0a803ea1 (patch) | |
| tree | a0c48d912160429305357c9d1b9d31a00f8167a5 /src/mainboard/pcengines/apu2 | |
| parent | eed97c538ca6b357ebc5d02be074971d6081c70b (diff) | |
mb/pcengines/apu2/BiosCallOuts: don't have binaryPI clear LPC decodes
Tell binaryPI to not disable the LPC decodes for the IO ports used by
the serial ports on the Super I/O chip during the AmdInitReset binaryPI
entry point. Checked the Stoneyridge binaryPI source code which is
closely enough related to be reasonable sure that this option only
controls which LPC decode bits get cleared and won't have any other side
effects.
TEST=Now the full console output from the APU2 board gets printed on the
serial console.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Change-Id: I91ef4423bd7bf6c1d7a175336f0f89479f2cde02
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79852
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/pcengines/apu2')
| -rw-r--r-- | src/mainboard/pcengines/apu2/BiosCallOuts.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c index efd88d8c12..c78dda6ecb 100644 --- a/src/mainboard/pcengines/apu2/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c @@ -45,7 +45,7 @@ void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams) { printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); //FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */ - FchParams->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); + FchParams->LegacyFree = 0; /* don't clear LPC IO decodes for serial console */ FchParams->FchReset.SataEnable = hudson_sata_enable(); FchParams->FchReset.IdeEnable = hudson_ide_enable(); FchParams->FchReset.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); |