diff options
| author | Kamil Wcislo <kamil.wcislo@3mdeb.com> | 2017-10-12 11:55:16 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-10-20 02:19:23 +0000 |
| commit | 70b92456eb2f507b6d6ce24212219e7dfbb59747 (patch) | |
| tree | f4eb46df82cf87dffb01e1202d118f491d8eb92c /src/mainboard/pcengines/apu2/romstage.c | |
| parent | 6a35fab2723f3b1ca288cd9224d263570cfbe184 (diff) | |
mainboard/pcengines/apu2: add apu3 and apu5 variants
Apu3 and apu5 are additional variants of apu2 board.
Apu3 has no LPC connector exposed, but has additional USB header. It has
also 2 slots for SIM cards and one of the gpios is used to control
switching between them.
Apu5 is differing by having 6 SIM card slots (3 SIMSWAP switches).
This patch adds support for those other variants by not introducing
additional code redundancy.
Change-Id: I4fded98fed7a8085062cdea035ecac3d608cd2a0
Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
Reviewed-on: https://review.coreboot.org/21981
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/pcengines/apu2/romstage.c')
| -rw-r--r-- | src/mainboard/pcengines/apu2/romstage.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index 9eb9e817d0..14335185b8 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -116,7 +116,12 @@ static void early_lpc_init(void) // // Configure output disabled, value low, pull up/down disabled // - configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_32, Function0, GPIO_32, setting); + if (IS_ENABLED(CONFIG_BOARD_PCENGINES_APU2) || + IS_ENABLED(CONFIG_BOARD_PCENGINES_APU3)) { + configure_gpio(ACPI_MMIO_BASE, + IOMUX_GPIO_32, Function0, GPIO_32, setting); + } + configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_49, Function2, GPIO_49, setting); configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_50, Function2, GPIO_50, setting); configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_71, Function0, GPIO_71, setting); @@ -124,6 +129,11 @@ static void early_lpc_init(void) // Configure output enabled, value low, pull up/down disabled // setting = 0x1 << GPIO_OUTPUT_ENABLE; + if (IS_ENABLED(CONFIG_BOARD_PCENGINES_APU3)) { + configure_gpio(ACPI_MMIO_BASE, + IOMUX_GPIO_33, Function0, GPIO_33, setting); + } + configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_57, Function1, GPIO_57, setting); configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_58, Function1, GPIO_58, setting); configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_59, Function3, GPIO_59, setting); @@ -131,6 +141,13 @@ static void early_lpc_init(void) // Configure output enabled, value high, pull up/down disabled // setting = 0x1 << GPIO_OUTPUT_ENABLE | 0x1 << GPIO_OUTPUT_VALUE; + if (IS_ENABLED(CONFIG_BOARD_PCENGINES_APU5)) { + configure_gpio(ACPI_MMIO_BASE, + IOMUX_GPIO_32, Function0, GPIO_32, setting); + configure_gpio(ACPI_MMIO_BASE, + IOMUX_GPIO_33, Function0, GPIO_33, setting); + } + configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_51, Function2, GPIO_51, setting); configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_55, Function3, GPIO_55, setting); configure_gpio(ACPI_MMIO_BASE, IOMUX_GPIO_64, Function2, GPIO_64, setting); |