diff options
author | Raul E Rangel <rrangel@chromium.org> | 2021-06-25 11:15:41 -0600 |
---|---|---|
committer | Raul Rangel <rrangel@chromium.org> | 2021-07-18 15:17:17 +0000 |
commit | fca58334c8e08427ff9f87e5d121f487d7f45484 (patch) | |
tree | ae32ea87ddc66689bb7bdd3e18f023c94be944c5 /src/mainboard/pcengines/apu1 | |
parent | ce63dc4daab539b3c4b6d860145f1541854e6d3d (diff) |
soc/amd/common/apob: Add support for asynchronously reading APOB_NV
This CL adds a method that can start the processes of reading the APOB
from SPI. It does require more RAM in ramstage since we no longer mmap
the buffer in the happy path. This will allow us to reduce our
boot time by ~10ms. The SoC code will need to be updated to call
start_apob_cache_read at a point where it makes sense.
BUG=b:179699789
TEST=With this and the patches above I can see a 10 ms reduction in
boot time on guybrush.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I930d58b76eb4558bc4f48ed928c4d6538fefb1e5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56232
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/pcengines/apu1')
0 files changed, 0 insertions, 0 deletions