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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-11-11 17:22:23 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-23 21:33:55 +0100
commit0b87bb77261fc106d6473eba25202d719fd7b13d (patch)
tree25550bbf6df880ed0bb92f6ed26c5db425954d02 /src/mainboard/pcengines/apu1
parenta6c7ae70140450205cda6226e1905dfecb6cfabf (diff)
AMD cimx/sb800: Disconnect PCI bridge 0:14.4 from pins
Some GPIO pins are shared with PCI bridge 0:14.4. As our PCI subsystem currently does not configure PCI bridges that are marked disabled, but remain visible in the hardware, simply setting 0:14.4 disabled in the devicetree does not work here yet. Change-Id: Ib9652e12a888e1d797d879d97737ba4101b7029a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8495 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/pcengines/apu1')
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